Abstract: A video server includes a plurality of input/output devices coupled to a plurality of memory arrays via a commutator. Within each memory array, a buffer is operative to collect data for transfer to and/or from an array controller. Each memory array includes an error correction system providing parity-based RAID type error correction. A plurality of disk controllers each having a FIFO buffer and respective pluralities of disk memories are commonly coupled to a communication bus which in turn is coupled to the error correction system by a FIFO buffer. A segment buffer having a plurality of low cost memory devices which are configured to provide a plurality of ring buffers is coupled to the data bus. An access logic circuit controls the data flow through the FIFO buffer and a central processing unit is operative to provide address sequence upon the communication bus for controlling data transfer to and from the segment buffer.

Abstract: A system having N access channels, M individual disk storage arrays, a commutator for connecting each of the access channels to each of the storage arrays; and a control unit for causing the commutator to connect each of the access channels to each of the storage arrays. The disk storage arrays are capable of storing contiguous segments of a data block. In the case of movies, each segment includes, for example, a few seconds of each relevant movie. The commutator connects the access channels to the disk storage arrays in a manner whereby each of the access channels has access to all of the data. The system is such that each access channel can receive data at the maximum system bandwidth. In addition, data can be written into the storage arrays by one access channel, while another of the access channels is receiving data, both at the maximum system bandwidth.