Abstract: A financial transactions processing system includes a cradle to receive dispensed notes for dispensing cash to customers and/or tellers. The cradle may be rotatable for use with more than one user. The cradle may have end walls to provide security and privacy to each user. A rotatable shield may provide additional security and privacy. A lock may prevent the cradle and/or shield from rotating to prevent unauthorized access to cash in the cradle.

Abstract: A method of forming a semiconducting wafer is provided that utilizes fewer processing operations, reduces process variation, and lowers cost as well as production time. The method provided further improves via reliability by permitting vias to be formed with consistent aspect ratios. Devices and method are provided that substantially eliminate four way intersections on semiconductor wafers between conducting elements and supplemental elements. The devices and methods provide a more uniform deposition rate of a subsequent dielectric layer. Four way intersections are removed from both conductive element regions as well as supplemental element regions.

Abstract: A financial transactions processing system is operable in more than one mode so that it can have increased usefulness to the bank. Such a system can be switched between the available modes as desired by the bank so that separate, dedicated machines for operation in a single one of the different modes are not necessary.

Abstract: A method and structure are disclosed that are advantageous for aligning a contact plug within a bit line contact corridor (BLCC) to an active area of a DRAM that utilizes an insulated sleeve structure. A sleeve insulator layer is deposited in an opening to protect one or more conductor layers from conductive contacts formed in the opening. The sleeve insulator layer electrically insulates a conductive plug from the conductor layer and self-aligns the BLCC so as to improve contact plug alignment tolerances between the BLCC and the capacitor or conductive components.

Abstract: A financial transactions processing system includes a teller display screen and a customer display screen, both of which can be coupled to a teller computer. The teller computer can be operably connected to a bank computer. The teller computer provides the teller display screen with a first set of information to be displayed on the teller display screen, and supplies the customer display screen with a second set of information to be displayed on the customer display screen, such that the customer display screen and the teller display screen display different sets of information.

Abstract: A financial transactions processing system includes a cradle to receive dispensed notes for dispensing cash to customers and/or tellers. The cradle may be rotatable for use with more than one user. The cradle may have end walls to provide security and privacy to each user. A rotatable shield may provide additional security and privacy. A lock may prevent the cradle and/or shield from rotating to prevent unauthorized access to cash in the cradle.

Abstract: Embodiments concern vertical interconnect structures having sub-micron widths for use in integrated circuits, and methods of their manufacture, which result in reduced interconnect resistance, I2R losses, and defects or variations due to cusping. Embodiments of the methods involve forming an opening in an insulating layer, where the opening forms a trench that exposes an underlying portion of a metal layer. Additional embodiments involve depositing multiple layers of conductive material within the opening and above the insulating layer, where one of the conductive layers includes aluminum and is deposited using a “cold aluminum” process, and a second one of the conductive layers also includes aluminum, but is deposited using a “hot aluminum” process. The interconnect structures are adapted for use in conjunction with memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

Abstract: A method used during the manufacture of a semiconductor device comprises providing at least first, second, and third spaced conductive structures, where the second conductive structure is interposed between the first and third conductive structures. A first dielectric is formed over these conductive structures, then a portion of the first dielectric layer is removed which forms a hole in the dielectric layer to expose the second conductive structure. Subsequently, the second conductive structure is removed to leave a void or tunnel in the dielectric layer where the second conductive structure had previously existed. Finally, a second dielectric layer is provided to fill the hole but to leave the void or tunnel in the dielectric layer subsequent to the formation of the second dielectric layer. An inventive structure resulting from the inventive method is also described.

Abstract: A method of verifying the integrity of an item of value received at a destination location following transfer from a source at location is described. The method comprises carrying out one or more verification steps, at least one of which (26) comprises determining whether the time of arrival (22) of the item of value at the destination location satisfies a predetermined condition.

Abstract: Titanium-containing films exhibiting excellent uniformity and step coverage are deposited on semiconductor wafers in a cold wall reactor which has been modified to discharge plasma into the reaction chamber. Titanium tetrabromide, titanium tetraiodide, or titanium tetrachloride, along with hydrogen, enter the reaction chamber and come in contact with a heated semiconductor wafer, thereby depositing a thin titanium-containing film on the wafer's surface. Step coverage and deposition rate are enhanced by the presence of the plasma. The use of titanium tetrabromide or titanium tetraiodide instead of titanium tetrachloride also increases the deposition rate and allows for a lower reaction temperature. Titanium silicide and titanium nitride can also be deposited by this method by varying the gas incorporated with the titanium precursors.

Abstract: A fill pattern for a semiconductor device. The device includes a plurality of first topographic structures comprising conductive lead lines deposited on a semiconductor substrate, and a plurality of second topographic structures comprising fill patterns such that the top surfaces of the second topographic structures are generally coplanar with the top surfaces of the plurality of first topographic structures. The plurality of first and second topographic structures are arranged in a generally repeating array on the substrate. A planarization layer is deposited on top of the substrate such that it fills the space between the plurality of first and second topographic structures, with its top surface generally coplanar with that of the top surfaces of the first and second topographic structures.