Abstract: Apparatus and method for managing data in a multi-device data storage system. In some embodiments, a plurality of data storage devices are provided, each data storage device having a local driver circuit adapted to transfer data with a local memory module. A main driver circuit external to the plurality of data storage devices is configured to stream frequency modulated write data via parallel data transfer paths to the respective local driver circuits for concurrent transfer of the frequency modulated write data to the respective local memory modules.

Abstract: A mass data storage system includes a number of communicatively coupled storage drives powered and controlled by shared control electronics. The shared control electronics are configured to transmit analog read/write signals through an interconnect to each of the multiple individually selectable storage drives. The interconnect bi-directionally couples the control electronics to each of the multiple selectable storage drives.

Abstract: A charge leveler coupled between an external power supply and a data storage device includes a current limiter to receive an input current from the external power supply and to provide a limited input current at no more than a pre-determined level. A charge reservoir couplable in parallel with an output of the current limiter supplements the limited input current when the pre-determined level is exceeded. The charge reservoir is replenished with surplus limited current when the data storage device draws less than the pre-determined level. A boost assist regulator monitors a requested current from the data storage device, and initiates operation of the charge reservoir to supplement the limited input current when the requested current exceeds the limited input current.

Abstract: An apparatus includes a communication interface, a controller, and a power section. The communication interface is configured to receive power from an external host to the apparatus. The controller is configured to limit a current drawn by the communication interface to a predetermined value when the apparatus is powered through the external host. The power section is configured to generate a first voltage from a portion of the limited current drawn by the communication interface. The first voltage powers a data storage circuitry. The power section is further configured to store electrical charges received from another portion of the limited current drawn by the communication interface. The power section is further configured to generate a second voltage from the stored electrical charges in response to a signal from the controller. The second voltage supplements the first voltage during high power events by the data storage circuitry.

Abstract: A charge leveler coupled between an external power supply and a data storage device includes a current limiter to receive an input current from the external power supply and to provide a limited input current at no more than a pre-determined level. A charge reservoir couplable in parallel with an output of the current limiter supplements the limited input current when the pre-determined level is exceeded. The charge reservoir is replenished with surplus limited current when the data storage device draws less than the pre-determined level. A boost assist regulator monitors a requested current from the data storage device, and initiates operation of the charge reservoir to supplement the limited input current when the requested current exceeds the limited input current.

Abstract: A mass data storage system includes a number of communicatively coupled storage drives powered and controlled by shared control electronics. The shared control electronics are configured to transmit analog read/write signals through an interconnect to each of the multiple individually selectable storage drives. The interconnect bi-directionally couples the control electronics to each of the multiple selectable storage drives.

Abstract: Apparatus and method for managing data in a multi-device data storage system. In some embodiments, a control board interconnects a plurality of storage devices and supports at least first and second switch circuits each operationally connected to the respective storage devices. A storage device control circuit directs user data from a host device to the first switch circuit and control data to the second switch circuit. A peripheral interface control (PIC) circuit selectively establishes an active session, via the first and second switch circuits, between the storage device control circuit and a selected storage device responsive to a command received from the host device associated with the selected storage device.

Abstract: An apparatus includes a communication interface, a controller, and a power section. The communication interface is configured to receive power from an external host to the apparatus. The controller is configured to limit a current drawn by the communication interface to a predetermined value when the apparatus is powered through the external host. The power section is configured to generate a first voltage from a portion of the limited current drawn by the communication interface. The first voltage powers a data storage circuitry. The power section is further configured to store electrical charges received from another portion of the limited current drawn by the communication interface. The power section is further configured to generate a second voltage from the stored electrical charges in response to a signal from the controller. The second voltage supplements the first voltage during high power events by the data storage circuitry.

Abstract: Apparatus and method for managing data in a multi-device data storage system. In some embodiments, a plurality of data storage devices are provided, each data storage device having a local driver circuit adapted to transfer data with a local memory module. A main driver circuit external to the plurality of data storage devices is configured to stream frequency modulated write data via parallel data transfer paths to the respective local driver circuits for concurrent transfer of the frequency modulated write data to the respective local memory modules.