Patents by Inventor Philip Kaszuba

Philip Kaszuba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070222456
    Abstract: Disclosed is a fault isolation and measurement system that provides multiple near-field scanning isolation techniques on a common platform. The system incorporates the use of a specialized holder to supply electrical bias to internal circuit structures located within an area of a device or material. The system further uses a multi-probe assembly. Each probe is mounted to a support structure around a common reference point and is a component of a different measurement or fault isolation tool. The assembly moves such that each probe can obtain measurements from the same fixed location on the device or material. The relative positioning of the support structure and/or the holder can be changed in order to obtain measurements from multiple same fixed locations within the area. Additionally, the system uses a processor for providing layered images associated with each signal and for precisely aligning those images with design data in order to characterize, or isolate fault locations within the device or material.
    Type: Application
    Filed: November 30, 2005
    Publication date: September 27, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Philip Kaszuba, Theodore Levin, David Vallett
  • Publication number: 20070010097
    Abstract: Apparatus for exposure and probing of features in a semiconductor workpiece includes a hollow concentrator for covering a portion of the workpiece connected by a gas conduit to a supply of etchant gas. A stage supports and positions the semiconductor workpiece. Control means moves the stage and the semiconductor workpiece to the series of positions sequentially. An energy beam source directs a focused energy beam through an aperture through the concentrator onto a region on the surface of the workpiece in the presence of the etchant gas. The control means moves the stage to a series of positions with respect to the concentrator and the energy beam to direct the energy beam in the presence of the etchant gas to expose a series of regions on the surface of the semiconductor workpiece positioned below the hollow interior space of the concentrator, sequentially.
    Type: Application
    Filed: July 5, 2005
    Publication date: January 11, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew Deering, Terence Kane, Philip Kaszuba, Leon Moszkowicz, Carmelo Scrudato, Michael Tenney
  • Publication number: 20050283335
    Abstract: A method for measuring an integrated circuit (IC) structure by measuring an imprint of the structure, a method for preparing a test site for the above measuring, and IC so formed. The method for preparing the test site includes incrementally removing the structure from the substrate so as to reveal an imprint of the removed bottom surface of the structure in a top surface of the substrate. The imprint can then be imaged using an atomic force microscope (AFM). The image can be used to measure the bottom surface of the structure.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 22, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: G. Banke, Andrew Deering, Philip Kaszuba, Leon Moszkowicz, James Robert, James Slinkman