Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.

Abstract: A plasma treatment chamber comprises a chamber body having an opening in a top surface thereof. A rotatable pedestal is within the chamber body having a support surface to hold and rotate a workpiece in a processing region. A cross-flow pumping ring is over the opening in the chamber body to inject a gas flow in a direction generally parallel to and across a surface of the workpiece. A lid is over the cross-flow pumping ring, the lid having a plurality of microwave resonators to ignite the gas flow and form plasma.

Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.

Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.

Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.

Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.

Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.

Abstract: Methods and apparatus for low angle, selective plasma deposition on a substrate. A plasma chamber uses a process chamber having an inner processing volume, a three dimensional (3D) magnetron with a sputtering target with a hollow inner area that overlaps at least a portion of sides of the sputtering target and moves in a linear motion over a length of the sputtering target, a housing surrounding the 3D magnetron and the sputtering target such that at least one side of the housing exposes the hollow inner area of the sputtering target, and a linear channel interposed between the housing and a wall of the process chamber.

Abstract: Devices are described including a component comprising an alloy of AlN and AlSb. The component has an index of refraction substantially the same as that of a semiconductor in the optoelectronic device, and has high transparency at wavelengths of light used in the optoelectronic device. The component is in contact with the semiconductor in the optoelectronic device. The alloy comprises between 0% and 100% AlN by weight and between 0% and 100% AlSb by weight. The semiconductor can be a III-V semiconductor such as GaAs or AlGaInP. The component can be used as a transparent insulator. The alloy can also be doped to form either a p-type conductor or an n-type conductor, and the component can be used as a transparent conductor. Methods of making and devices utilizing the alloy are also disclosed.

Abstract: Epitaxial films are grown by alternately exposed to precursor dosing regions, inert gas plasma regions, hydrogen-containing plasma regions, chlorine-containing plasma and metrology regions, or regions where an atomic hydrogen source is located. Alternately, laser irradiation techniques may be substituted for the plasma energy in some of the processing regions. The film growth process can be implemented at substrate temperatures between about 25 C and about 600 C, together with optional exposures to laser irradiation to cause the surface of the film to melt or to experience a near-melt condition.

Abstract: Devices are described including a first component and a second component, wherein the first component comprises a Group III-N semiconductor and the second component comprises a bimetallic oxide containing tin, having an index of refraction within 15% of the index of refraction of the Group III-N semiconductor, and having negligible extinction coefficient at wavelengths of light emitted or absorbed by the Group III-N semiconductor. The first component is in optical contact with the second component. Exemplary bimetallic oxides include Sn1-xBixO2 where x?0.10, Zn2SnO2, Sn1-xAlxO2 where x?0.18, and Sn1-xMgxO2 where x?0.16. Methods of making and using the devices are also described.

Abstract: Devices are described including a component comprising an alloy of AlN and AlSb. The component has an index of refraction substantially the same as that of a semiconductor in the optoelectronic device, and has high transparency at wavelengths of light used in the optoelectronic device. The component is in contact with the semiconductor in the optoelectronic device. The alloy comprises between 0% and 100% AlN by weight and between 0% and 100% AlSb by weight. The semiconductor can be a III-V semiconductor such as GaAs or AlGaInP. The component can be used as a transparent insulator. The alloy can also be doped to form either a p-type conductor or an n-type conductor, and the component can be used as a transparent conductor. Methods of making and devices utilizing the alloy are also disclosed.

Abstract: Chemical vapor deposition (CVD) systems for forming layers on a substrate are disclosed. Embodiments of the system comprise at least two processing chambers that may be linked in a cluster tool. A first processing chamber provides a chamber having a controlled environmental temperature and pressure and containing a first environment for performing CVD on a substrate, and a second environment for contacting the substrate with a plasma; a substrate transport system capable of positioning a substrate for sequential processing in each environment, and a gas control system capable of maintaining isolation. A second processing chamber provides a CVD system. Methods of forming layers on a substrate comprise forming one or more layers in each processing chamber. The systems and methods are suitable for preparing Group III-V, Group II-VI or Group IV thin film devices.

Abstract: Chemical vapor deposition (CVD) systems for forming layers on a substrate are disclosed. Embodiments of the system comprise at least two processing chambers that may be linked in a cluster tool. A first processing chamber provides a chamber having a controlled environmental temperature and pressure and containing a first environment for performing CVD on a substrate, and a second environment for contacting the substrate with a plasma; a substrate transport system capable of positioning a substrate for sequential processing in each environment, and a gas control system capable of maintaining isolation. A second processing chamber provides a CVD system. Methods of forming layers on a substrate comprise forming one or more layers in each processing chamber. The systems and methods are suitable for preparing Group III-V, Group II-VI or Group IV thin film devices.

Abstract: An electrical contact is formed on a III-V semiconductor comprising gallium. The contact is formed by depositing a first layer comprising In, Au, and a dopant on the surface of a III-V semiconductor and a second layer comprising a conductive oxide on the first layer. The deposited layers are annealed in an inert atmosphere. The annealing causes the formation of a Ga—Au compound at the interface between the III-V semiconductor and the first layer. At least a portion of the dopant migrates into the III-V semiconductor such that the dopant provides n-type or p-type conductivity to the III-V semiconductor. The specific contact resistivity between the III-V semiconductor and the second layer is less than about 10?5 ?cm2. The layers are further annealed in an oxidizing atmosphere such that the indium in the first layer is oxidized to form indium oxide.

Abstract: HPC techniques are applied to the screening and evaluating the materials, process parameters, process sequences, and post deposition treatment processes for the development of ohmic contact stacks for optoelectronic devices. Simple test structures are employed for initial screening of basic materials properties of candidate materials for each layer within the stack. The use of multiple site-isolated regions on a single substrate allows many material and/or process conditions to be evaluated in a timely and cost effective manner. Interactions between the layers as well as interactions with the substrate can be investigated in a straightforward manner.

Abstract: Devices are described including a first component and a second component, wherein the first component comprises a Group III-N semiconductor and the second component comprises a bimetallic oxide containing tin, having an index of refraction within 15% of the index of refraction of the Group III-N semiconductor, and having negligible extinction coefficient at wavelengths of light emitted or absorbed by the Group III-N semiconductor. The first component is in optical contact with the second component. Exemplary bimetallic oxides include Sn1-xBixO2 where x?0.10, Zn2SnO2, Sn1-xAlxO2 where x?0.18, and Sn1-xMgxO2 where x?0.16. Methods of making and using the devices are also described.

Abstract: Methods and apparatus for generating and delivering atomic hydrogen to the growth front during the deposition of a III-V film are provided. The apparatus adapts HWCVD technology to a system wherein the Group III precursor and the Group V precursor are delivered to the surface in isolated processing environments within the system. Multiple HWCVD units may be incorporated so that the atomic hydrogen parameters may be varied in a combinatorial manner for the development of III-V films.

Abstract: A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB2VIA composition. A first deposition state is monitored, during the second deposition by making a first plurality of measurements of a first deposition state. The second deposition is terminated or attenuated based on a function of the first plurality of measurements of the indicia of the first deposition state.

Abstract: A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB2VIA composition. A first deposition state is monitored, during the second deposition by making a first plurality of measurements of a first deposition state. The second deposition is terminated or attenuated based on a function of the first plurality of measurements of the indicia of the first deposition state.