Patents by Inventor Philip Li

Philip Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200082239
    Abstract: A system and method comprising depositing a first layer on a substrate, in which the first layer comprises at least one of, a metal oxide and carbon based derivative, wherein the first layer is a gate electrode of a tag. Depositing a second layer, annealing said second layer, and treating a surface of the second layer, wherein the surface treatment is configured to enhance conductivity. Depositing a third layer, wherein the third layer is a gate dielectric of the tag. Depositing a fourth and a fifth layer. The fifth layer comprises at least an Indium Gallium Zinc Oxide layer and as a semiconductor layer of the tag. Photonic curing the fifth layer. Depositing a sixth and a seventh layer, in which the sixth layer is a source contact layer and said seventh layer is a drain contact layer of the tag.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Inventors: Philip Li, Marko Bajkovic
  • Patent number: 8462855
    Abstract: In one embodiment of the invention, video data is received in a buffer and parsed for a first and second start code to determine whether a complete video picture is present. After failing to identify the second start code, additional video data is added to the buffer and parsed beginning from a subsequent starting point, which is based on the first ending point.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: June 11, 2013
    Assignee: Intel Corporation
    Inventor: Philip Li
  • Publication number: 20090080511
    Abstract: In one embodiment of the invention, video data is received in a buffer and parsed for a first and second start code to determine whether a complete video picture is present. After failing to identify the second start code, additional video data is added to the buffer and parsed beginning from a subsequent starting point, which is based on the first ending point.
    Type: Application
    Filed: September 26, 2007
    Publication date: March 26, 2009
    Inventor: Philip Li
  • Patent number: 7341915
    Abstract: Methods are provided for forming a semiconductor device from a substrate comprising a bottom gate layer, a channel layer overlying the bottom gate layer, and a top gate structure formed over the channel layer. First, a hardmask comprising a first material interposed between a second material and a third material is deposited over a portion of the top gate structure. Then, the hardmask and top gate structure are encapsulated with an insulating material to form a spacer. A channel structure is formed from the channel layer, and the channel structure is disposed under the spacer. A bottom gate structure is formed from the bottom gate layer, and the bottom gate structure is disposed under the channel structure. Then, a source/drain contact is formed around the bottom gate structure.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: March 11, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Philip Li, Suman K. Banerjee, Thuy B. Dao, Olin L. Hartin, Jay P. John
  • Publication number: 20060270164
    Abstract: Methods are provided for forming a semiconductor device from a substrate comprising a bottom gate layer, a channel layer overlying the bottom gate layer, and a top gate structure formed over the channel layer. First, a hardmask comprising a first material interposed between a second material and a third material is deposited over a portion of the top gate structure. Then, the hardmask and top gate structure are encapsulated with an insulating material to form a spacer. A channel structure is formed from the channel layer, and the channel structure is disposed under the spacer. A bottom gate structure is formed from the bottom gate layer, and the bottom gate structure is disposed under the channel structure. Then, a source/drain contact is formed around the bottom gate structure.
    Type: Application
    Filed: May 31, 2005
    Publication date: November 30, 2006
    Inventors: Philip Li, Suman Banerjee, Thuy Dao, Olin Hartin, Jay John
  • Publication number: 20060220062
    Abstract: In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1-xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1-xAs channel layer (512) is formed over the AlxGa1-xAs layer (506). An AlxGa1-xAs layer (518) is formed over the InxGa1-xAs channel layer (512), and the AlxGa1-xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1-xAs layer (518). A control electrode (526) is formed over the AlxGa1-xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.
    Type: Application
    Filed: April 5, 2005
    Publication date: October 5, 2006
    Inventors: Bruce Green, Olin Hartin, Ellen Lan, Philip Li, Monte Miller, Matthias Passlack, Marcus Ray, Charles Weitzel