Patents by Inventor Philip Li
Philip Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11969393Abstract: In some embodiments, an affixed group of pharmaceutical vials with frangible connectors includes: a plurality of pharmaceutical vials arranged as a group of pharmaceutical vials, each of the plurality of pharmaceutical vials shaped and positioned to minimize a total volume of the group of pharmaceutical vials, each of the pharmaceutical vials including at least one external side with a surface configured to reversibly mate with a corresponding external side and a surface of an adjacent pharmaceutical vial; and a plurality of frangible connectors, wherein at least one frangible connector is affixed to the surface of at least two of the plurality of pharmaceutical vials within the group of pharmaceutical vials, and at least one frangible connector is affixed to each of the plurality of pharmaceutical vials.Type: GrantFiled: June 17, 2014Date of Patent: April 30, 2024Inventors: John Boomgard, Fong-Li Chou, Philip A. Eckhoff, Fridrik Larusson, Shieng Liu, Krishnan Natarajan, Nels R. Peterson, Lowell L. Wood, Jr.
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Patent number: 11959868Abstract: Embodiments disclosed herein include gas concentration sensors, and methods of using such gas concentration sensors. In an embodiment, a gas concentration sensor comprises a first electrode. In an embodiment the first electrode comprises first fingers. In an embodiment, the gas concentration sensor further comprises a second electrode. In an embodiment, the second electrode comprises second fingers that are interdigitated with the first fingers.Type: GrantFiled: February 3, 2021Date of Patent: April 16, 2024Assignee: Applied Materials, Inc.Inventors: Xiaopu Li, Kallol Bera, Yaoling Pan, Kelvin Chan, Amir Bayati, Philip Allan Kraus, Kenric T. Choi, William John Durand
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Patent number: 11946140Abstract: Exemplary substrate processing systems may include a chamber body defining a transfer region. The systems may include a first lid plate seated on the chamber body. The first lid plate may define a plurality of apertures through the first lid plate. The systems may include a plurality of lid stacks equal to a number of the plurality of apertures. The systems may define a plurality of isolators. An isolator may be positioned between each lid stack and a corresponding aperture of the plurality of apertures. The systems may include a plurality of annular spacers. An annular spacer of the plurality of annular spacers may be positioned between each isolator and a corresponding lid stack of the plurality of lids stacks. The systems may include a plurality of manifolds. A manifold may be seated within an interior of each annular spacer of the plurality of annular spacers.Type: GrantFiled: March 26, 2021Date of Patent: April 2, 2024Assignee: Applied Materials, Inc.Inventors: Anantha K. Subramani, Seyyed Abdolreza Fazeli, Yang Guo, Ramcharan Sundar, Arun Kumar Kotrappa, Steven Mosbrucker, Steven D. Marcus, Xinhai Han, Kesong Hu, Tianyang Li, Philip A. Kraus
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Patent number: 11946098Abstract: Electrochemical sensors have great promise for point-of-care and in vivo measurement of medically relevant molecules. However, the need for calibrating individual sensors limits the practical applicability of these sensing platforms. The invention provides a novel method of operating electrochemical sensors which obviates the need to calibrate individual sensors against a sample of known concentration. The invention exploits the frequency dependence of electrochemical output signals and the dependence of output signals on the inherent electron transfer kinetics of a selected sensor design. By use of signals generated at a nonresponsive frequency, a normalizing output value is generated that accounts for sensor-to-sensor variation and which enables an accurate calculation of target concentration. The scope of the invention also includes pre-calibrated sensors that may be utilized without calibration steps.Type: GrantFiled: June 1, 2018Date of Patent: April 2, 2024Assignee: The Regents of the University of CaliforniaInventors: Kevin Plaxco, Hui Li, Philip Dauphin-Ducharme, Gabriel Ortega
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Publication number: 20240097230Abstract: The invention relates to a battery device (10) for a motor vehicle, having a plurality of battery cells (12) which are accommodated in a housing and rest at least against a heat-conducting potting compound (20) or a heat-conducting pad, which potting compound or pad rests against at least one structural component (22) of the battery device (10), as a result of which heat (14) can be dissipated from the battery cells (12) to the structural component (22) via the heat-conducting potting compound (20) or the heat-conducting pad.Type: ApplicationFiled: January 24, 2022Publication date: March 21, 2024Inventors: Savo ASANIN, Nicolas FLAHAUT, Philip GUERRERO, Michael HUBER, Tuncay IDIKURT, Qi LI, Alexander RHEINFELD, Robin RUECKER, Aron VARGA, Tyron VIGODSKI, Linda WENZEL
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Publication number: 20240041482Abstract: The present invention relates to the field of medical instruments, more particularly to a pulse balloon and use thereof. The pulse balloon comprises a balloon body and an inner tube, wherein the balloon body comprises an insulating layer and a balloon wall. The insulating layer is arranged on the balloon body, when the balloon body operates, the balloon body is filled with an electrolyte so that an electrode releases high-pulse piezoelectricity to generate pulses, the electrolyte spreads to drive the vibration of the balloon, so that most of electrical energy is converted into mechanical energy to break down a calcified area of a blood vessel, and the residual high voltage is blocked by the insulating layer.Type: ApplicationFiled: August 13, 2021Publication date: February 8, 2024Inventors: Philip Li WANG, Chenzhao ZHANG, Xinfeng LIANG, Tao CAI, Junyi WANG
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Publication number: 20200082239Abstract: A system and method comprising depositing a first layer on a substrate, in which the first layer comprises at least one of, a metal oxide and carbon based derivative, wherein the first layer is a gate electrode of a tag. Depositing a second layer, annealing said second layer, and treating a surface of the second layer, wherein the surface treatment is configured to enhance conductivity. Depositing a third layer, wherein the third layer is a gate dielectric of the tag. Depositing a fourth and a fifth layer. The fifth layer comprises at least an Indium Gallium Zinc Oxide layer and as a semiconductor layer of the tag. Photonic curing the fifth layer. Depositing a sixth and a seventh layer, in which the sixth layer is a source contact layer and said seventh layer is a drain contact layer of the tag.Type: ApplicationFiled: September 12, 2018Publication date: March 12, 2020Inventors: Philip Li, Marko Bajkovic
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Patent number: 8462855Abstract: In one embodiment of the invention, video data is received in a buffer and parsed for a first and second start code to determine whether a complete video picture is present. After failing to identify the second start code, additional video data is added to the buffer and parsed beginning from a subsequent starting point, which is based on the first ending point.Type: GrantFiled: September 26, 2007Date of Patent: June 11, 2013Assignee: Intel CorporationInventor: Philip Li
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Publication number: 20090080511Abstract: In one embodiment of the invention, video data is received in a buffer and parsed for a first and second start code to determine whether a complete video picture is present. After failing to identify the second start code, additional video data is added to the buffer and parsed beginning from a subsequent starting point, which is based on the first ending point.Type: ApplicationFiled: September 26, 2007Publication date: March 26, 2009Inventor: Philip Li
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Patent number: 7341915Abstract: Methods are provided for forming a semiconductor device from a substrate comprising a bottom gate layer, a channel layer overlying the bottom gate layer, and a top gate structure formed over the channel layer. First, a hardmask comprising a first material interposed between a second material and a third material is deposited over a portion of the top gate structure. Then, the hardmask and top gate structure are encapsulated with an insulating material to form a spacer. A channel structure is formed from the channel layer, and the channel structure is disposed under the spacer. A bottom gate structure is formed from the bottom gate layer, and the bottom gate structure is disposed under the channel structure. Then, a source/drain contact is formed around the bottom gate structure.Type: GrantFiled: May 31, 2005Date of Patent: March 11, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Philip Li, Suman K. Banerjee, Thuy B. Dao, Olin L. Hartin, Jay P. John
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Publication number: 20060270164Abstract: Methods are provided for forming a semiconductor device from a substrate comprising a bottom gate layer, a channel layer overlying the bottom gate layer, and a top gate structure formed over the channel layer. First, a hardmask comprising a first material interposed between a second material and a third material is deposited over a portion of the top gate structure. Then, the hardmask and top gate structure are encapsulated with an insulating material to form a spacer. A channel structure is formed from the channel layer, and the channel structure is disposed under the spacer. A bottom gate structure is formed from the bottom gate layer, and the bottom gate structure is disposed under the channel structure. Then, a source/drain contact is formed around the bottom gate structure.Type: ApplicationFiled: May 31, 2005Publication date: November 30, 2006Inventors: Philip Li, Suman Banerjee, Thuy Dao, Olin Hartin, Jay John
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Publication number: 20060220062Abstract: In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1-xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1-xAs channel layer (512) is formed over the AlxGa1-xAs layer (506). An AlxGa1-xAs layer (518) is formed over the InxGa1-xAs channel layer (512), and the AlxGa1-xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1-xAs layer (518). A control electrode (526) is formed over the AlxGa1-xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.Type: ApplicationFiled: April 5, 2005Publication date: October 5, 2006Inventors: Bruce Green, Olin Hartin, Ellen Lan, Philip Li, Monte Miller, Matthias Passlack, Marcus Ray, Charles Weitzel
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Publication number: 20030209811Abstract: A method and apparatus for decreasing contact resistance between a ohmic contact (120) and a semiconductor material (106) are disclosed. Increased contact resistance, which occurs as a result of encroachment of the ohmic contact (120) into the semiconductor material (106) is compensated for by notching edges of the ohmic contact (1210) to increase the effective surface area between abutting surfaces of the ohmic contact (120) and semiconductor material (106).Type: ApplicationFiled: June 16, 2003Publication date: November 13, 2003Inventors: Paige M. Holm, Olin L. Hartin, H. Philip Li
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Patent number: 6596616Abstract: A method and apparatus for decreasing contact resistance between a ohmic contact (120) and a semiconductor material (106) are disclosed. Increased contact resistance, which occurs as a result of encroachment of the ohmic contact (120) into the semiconductor material (106) is compensated for by notching edges of the ohmic contact (1210) to increase the effective surface area between abutting surfaces of the ohmic contact (120) and semiconductor material (106). The increase in surface area increases the effective transfer length of the contact, which correspondingly reduces contact resistance and improves device performance.Type: GrantFiled: April 19, 2002Date of Patent: July 22, 2003Assignee: Motorola, Inc.Inventors: Paige M. Holm, Olin L. Hartin, H. Philip Li