Patents by Inventor Philip M. Neches
Philip M. Neches has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7259031Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.Type: GrantFiled: November 8, 2005Date of Patent: August 21, 2007Assignee: Luxtera, Inc.Inventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Philip M. Neches, Andrew Shane Huang
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Patent number: 7251386Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.Type: GrantFiled: January 14, 2004Date of Patent: July 31, 2007Assignee: Luxtera, IncInventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Andrew Shane Huang, Philip M. Neches
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Patent number: 5303383Abstract: A multistage interconnect network (MIN) capable of supporting massive parallel processing, including point-to-point and multicast communications between processor modules (PMs) which are connected to the input and output ports of the network. The network is built using interconnected switch nodes arranged in 2 log.sub.b N stages, wherein b is the number of switch node input/output ports, N is the number of network input/output ports and log.sub.b N indicates a ceiling function providing the smallest integer not less than log.sub.b N. The additional stages provide additional paths between network input ports and network output ports, thereby enhancing fault tolerance and lessening contention.Type: GrantFiled: August 14, 1992Date of Patent: April 12, 1994Assignee: NCR CorporationInventors: Philip M. Neches, Robert J. McMillen, M. Cameron Watson, David J. Chura
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Patent number: 5276899Abstract: A multiprocessor system intercouples the processors with an active logic network having a plurality of priority determining nodes. Messages applied concurrently to the network in groups are sorted, using the data content of the messages, to a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priority scheme and are transferred in contending groups with prioritization on the network. Using data, status, control and response messages, and different multiprocessor modes, the system is particularly suited for configuration in a relational data base machine having capability for maintaining an extended data base and handling complex queries.Type: GrantFiled: August 10, 1990Date of Patent: January 4, 1994Assignee: Teredata CorporationInventor: Philip M. Neches
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Patent number: 5006978Abstract: A multiprocessor system intercouples the processors with an active logic network having a plurality of priority determining nodes. Messages applied concurrently to the network in groups are sorted, using the data content of the messages, to a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priority scheme and are transferred in contending groups with prioritization on the network. Using data, status, control and response messages, and different multiprocessor modes, the system is particularly suited for configuration in a relational data base machine having capability for maintaining an extended data base and handling complex queries.Type: GrantFiled: September 7, 1988Date of Patent: April 9, 1991Assignee: Teradata CorporationInventor: Philip M. Neches
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Patent number: 4956772Abstract: A multiprocessor system intercouples the processors with an active logic network having a plurality of priority determining nodes. Messages applied concurrently to the network in groups are sorted, using the data content of the meassages, to a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priorty scheme and are transferred in contending groups with prioritization on the network. Using data, status, control and response messages, and different multiprocessor modes, the system is particularly suited for configuration in a relational data base machine having capability for maintaining an extended data base and handling complex queries.Type: GrantFiled: November 3, 1988Date of Patent: September 11, 1990Assignee: Teradata CorporationInventor: Philip M. Neches
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Patent number: 4945471Abstract: A multiprocessor system intercouples the processors wtih an active logic network having a plurality of priority determining nodes. Messages applied concurrently to the network in groups are sorted, using the data content of the messages, to a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priority scheme and are transferred in contending groups with prioritization on the network. Using data, status, control and response messages, and different multiprocessor modes, the system is particularly suited for configuration in a relational data base machine having capability for maintaining an extended data base and handling complex queries.Type: GrantFiled: September 8, 1988Date of Patent: July 31, 1990Assignee: Teradata CorporationInventor: Philip M. Neches
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Patent number: 4925311Abstract: A system for dynamically partitioning processors in a multiprocessor system intercoupled by a network utilizes, in association with each processor, a network accessible, locally changeable memory section. An available one of a number of common dynamic group addresses in each of the memories is reserved for a subgroup for the performance of subtasks within an overall task, and members of the group are designated as they receive messages to be processed. The members then locally update status words which establish membership, group validity and semaphore conditions, so that transactions may be initiated, coordinated and terminated with minimum involvement of processors that have no relevant subtasks. When the full task is completed the dynamic group is relinquished for use when a new task is to be undertaken. The system enables many tasks to be carried out concurrently with higher intercommunication efficiency.Type: GrantFiled: February 10, 1986Date of Patent: May 15, 1990Assignee: Teradata CorporationInventors: Philip M. Neches, David H. Hartke, Richard J. Baran, Darryl L. Woodcock, Alexandros C. Papachristidis
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Patent number: 4814979Abstract: A multiprocessor system intercouples the processors with an active logic network having a plurality of priority determining nodes. Messages applied concurrently to the network in groups are sorted, using the data content of the messages, to a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priority scheme and are transferred in contending groups with prioritization on the network. Using data, status, control and response messages, and different multiprocessor modes, the system is particularly suited for configuration in a relational data base machine having capability for maintaining an extended data base and handling complex queries.Type: GrantFiled: July 16, 1985Date of Patent: March 21, 1989Assignee: Teradata CorporationInventor: Philip M. Neches
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Patent number: 4543630Abstract: A multiprocessor system intercouples the processors with an active logic network having a plurality of priority determining nodes. Messages applied concurrently to the network in groups are sorted, using the data content of the messages, to a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priority scheme and are transferred in contending groups with prioritization on the network. Using data, status, control and response messages, and different multiprocessor modes, the system is particularly suited for configuration in a relational data base machine having capability for maintaining an extended data base and handling complex queries.Type: GrantFiled: April 19, 1984Date of Patent: September 24, 1985Assignee: Teradata CorporationInventor: Philip M. Neches
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Patent number: 4445171Abstract: A multiprocessor system intercouples processors with an active logic network having a plurality of priority determining nodes. Messages are applied concurrently to the network in groups from the processors and are sorted, using the data content of the messages to determine priority, to select a single or common priority message which is distributed to all the processors with a predetermined total network delay time. Losing messages are again retried concurrently in groups at a later time. Message routing is determined by local acceptance or rejection of messages at the processors, based upon destination data in the messages. All messages occupy places in a coherent priority scheme and are transferred in contending groups with prioritization on the network.Type: GrantFiled: April 1, 1981Date of Patent: April 24, 1984Assignee: Teradata CorporationInventor: Philip M. Neches
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Patent number: 4412285Abstract: A system using a sorting network to intercouple multiple processors so as to distribute priority messages to all processors is characterized by semaphore means accessible to both the local processors and the global resource via the network. Transaction numbers identifying tasks are employed in the messages, and interfaces at each processor are locally controlled to establish transaction number related indications of the current status of each task being undertaken at the associated processor. A single query to all processors via the network elicits a prioritized response that denotes the global status as to that task. The transaction numbers also are used as global commands and local controls for the flow of messages. A destination selection system based on words in the messages is used as the basis for local acceptance or rejection of messages. This arrangement together with the transaction number system provides great flexibility as to intercommunication and control.Type: GrantFiled: April 1, 1981Date of Patent: October 25, 1983Assignee: Teradata CorporationInventors: Philip M. Neches, David H. Hartke, Richard C. Stockton, Martin C. Watson, David Cronshaw, Jack E. Shemer