Patents by Inventor Philip Steiner
Philip Steiner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240385102Abstract: In one embodiment a first light plane is generated across the passageway by a first LED emitter array. A corresponding photodiode receiver array detects particles passing through a first number of light channels comprising the first light plane. In a second embodiment a second light plane is generated across the passageway at 90 degrees from the first light plane and longitudinally offset from the first light plane by a second LED emitter array. A corresponding photodiode receiver array detects particles passing through a second number of light channels comprising the second light plane. The second light plane is capable of identifying particles in a third dimension that may go undetected when passing through the first light plane. The raw output signals generated by respective photodiodes is normalized, analyzed and characterized to differentiate between particles passing through light planes as individual particles or groups of overlapping particles to be separately counted.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Chad E. Plattner, Philip Steiner
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Patent number: 12050169Abstract: In one embodiment a first light plane is generated across the passageway by a first LED emitter array. A corresponding photodiode receiver array detects particles passing through a first number of light channels comprising the first light plane. In a second embodiment a second light plane is generated across the passageway at 90 degrees from the first light plane and longitudinally offset from the first light plane by a second LED emitter array. A corresponding photodiode receiver array detects particles passing through a second number of light channels comprising the second light plane. The second light plane is capable of identifying particles in a third dimension that may go undetected when passing through the first light plane. The raw output signals generated by respective photodiodes is normalized, analyzed and characterized to differentiate between particles passing through light planes as individual particles or groups of overlapping particles to be separately counted.Type: GrantFiled: March 20, 2020Date of Patent: July 30, 2024Assignee: Precision Planting LLCInventors: Chad E. Plattner, Philip Steiner
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Publication number: 20220155214Abstract: In one embodiment a first light plane is generated across the passageway by a first LED emitter array. A corresponding photodiode receiver array detects particles passing through a first number of light channels comprising the first light plane. In a second embodiment a second light plane is generated across the passageway at 90 degrees from the first light plane and longitudinally offset from the first light plane by a second LED emitter array. A corresponding photodiode receiver array detects particles passing through a second number of light channels comprising the second light plane. The second light plane is capable of identifying particles in a third dimension that may go undetected when passing through the first light plane. The raw output signals generated by respective photodiodes is normalized, analyzed and characterized to differentiate between particles passing through light planes as individual particles or groups of overlapping particles to be separately counted.Type: ApplicationFiled: March 20, 2020Publication date: May 19, 2022Inventors: Chad E. Plattner, Philip Steiner
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Publication number: 20170025141Abstract: The embodiments disclose a method including patterning a template substrate to have different densities using hierarchical block copolymer density patterns in different zones including a first pattern and a second pattern, using a first directed self-assembly to pattern a first zone in the substrate using a first block copolymer material, and using a second directed self-assembly to pattern a second zone in the substrate using a second block copolymer material.Type: ApplicationFiled: October 10, 2016Publication date: January 26, 2017Inventors: XiaoMin Yang, Shuaigang Xiao, Kim Y. Lee, Koichi Wago, Philip Steiner
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Patent number: 9489974Abstract: The embodiments disclose a method including patterning a template substrate to have different densities using hierarchical block copolymer density patterns in different zones including a first pattern and a second pattern, using a first directed self-assembly to pattern a first zone in the substrate using a first block copolymer material, and using a second directed self-assembly to pattern a second zone in the substrate using a second block copolymer material.Type: GrantFiled: April 11, 2014Date of Patent: November 8, 2016Assignee: Seagate Technology LLCInventors: XiaoMin Yang, Shuaigang Xiao, Kim Y. Lee, Koichi Wago, Philip Steiner
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Patent number: 9230589Abstract: The embodiments disclose a method including creating at least one first structure including magnetically isolated features in servo fields, and creating at least one second structure including finger-structure patterns including intentional weak nucleation points in servo fields to create a regular bi-polar magnetization direction after bulk DC initialization, and wherein the first and second structures form bi-polar complementary structure patterns.Type: GrantFiled: March 6, 2014Date of Patent: January 5, 2016Assignee: Seagate Technology LLCInventors: Philip Steiner, René J. M. van de Veerdonk
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Publication number: 20150294680Abstract: The embodiments disclose a method including patterning a template substrate to have different densities using hierarchical block copolymer density patterns in different zones including a first pattern and a second pattern, using a first directed self-assembly to pattern a first zone in the substrate using a first block copolymer material, and using a second directed self-assembly to pattern a second zone in the substrate using a second block copolymer material.Type: ApplicationFiled: April 11, 2014Publication date: October 15, 2015Applicant: SEAGATE TECHNOLGOY LLCInventors: XiaoMin Yang, Shuaigang Xiao, Kim Y. Lee, Koichi Wago, Philip Steiner
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Publication number: 20150246476Abstract: The embodiments disclose an analyzer configured to determine positions of circumferential gratings track features and alignment patterns in a first template and a phase device configured to determine positions of radial gratings features and interspersed pattern fields in a second template, wherein the first template is transferred and cross-imprinted with the second template features and patterns to form a third template substrate as a rectangular patterned stack imprint template.Type: ApplicationFiled: March 2, 2014Publication date: September 3, 2015Applicant: Seagate Technology LLCInventors: Philip Steiner, Kim Y. Lee, Koichi Wago, Bruce Buch, David S. Kuo
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Patent number: 8879184Abstract: Provided herein is an apparatus, including a servo pattern having magnetic features, wherein each magnetic feature of the magnetic features includes a single magnetic domain; a first population of the magnetic features; a second population of the magnetic features; and a selective magnetization means for selective magnetization of either one of the first population or the second population of magnetic features over the other.Type: GrantFiled: February 7, 2014Date of Patent: November 4, 2014Assignee: Seagate Technology LLCInventor: Philip Steiner
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Publication number: 20140266524Abstract: The embodiments disclose a method including creating at least one first structure including magnetically isolated features in servo fields, and creating at least one second structure including finger-structure patterns including intentional weak nucleation points in servo fields to create a regular bi-polar magnetization direction after bulk DC initialization, and wherein the first and second structures form bi-polar complementary structure patterns.Type: ApplicationFiled: March 6, 2014Publication date: September 18, 2014Applicant: Seagate Technology LLCInventors: Philip Steiner, René J.M. van de Veerdonk
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Publication number: 20080114707Abstract: There is provided an electronic taximeter that accepts a digital data input representative of one of a vehicle speed and a distance traveled by the vehicle. The digital data signal may be taken from the electronic engine bus of the vehicle or from the On Board Diagnostic connector. The taximeter has reading means to read the digital data input, timing means to provide timing data and computation means operatively connected to the reading means and the timing means for computing a fare associated with a trip. The computation means can advantageously be provided with speed integration means for integrating the speed data with respect to time, or summation means where the input is a digital distance, in order to determine the distance traveled by the vehicle with an accuracy meeting the regulations.Type: ApplicationFiled: November 13, 2006Publication date: May 15, 2008Inventor: Philip Steiner
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Patent number: 6641935Abstract: A low noise, high areal recording density, perpendicular magnetic recording medium, comprises: (a) a non-magnetic substrate having a surface with a layer stack formed thereon, the layer stack comprising, in overlying sequence from the substrate surface: (b) a soft magnetic underlayer comprised of a soft magnetic multilayer superlattice structure; and (c) a perpendicularly anisotropic, hard magnetic recording layer. Embodiments of the invention include providing the soft magnetic multilayer superlattice structure in the form of n stacked soft magnetic/non-magnetic layer pairs, where n is an integer between about 2 and about 9.Type: GrantFiled: September 20, 2001Date of Patent: November 4, 2003Assignee: Seagate Technology LLCInventors: Shaoping Li, Ga-lane Chen, Charles Potter, Dean Palmer, Philip Steiner
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Patent number: 6642879Abstract: A method and system for powering down an analog-to-digital converter (“ADC”) into a sleep mode are disclosed. If the ADC receives a normal set of pulses for a serial clock signal of the ADC, a serial interface controller outputs converted data requested by a user through a serial interface. Also, if the ADC receives a sleep set of pulses for the serial clock signal, a state machine of the ADC powers down the ADC into a sleep mode in which at least parts of the ADC are operated at a reduced power consumption level. Furthermore, if the ADC is in the sleep mode and the ADC receives a wake-up set of pulses for the serial clock signal, the state machine powers back up the ADC from the sleep mode.Type: GrantFiled: July 16, 2001Date of Patent: November 4, 2003Assignee: Cirrus Logic, Inc.Inventors: Aryesh Amar, Philip Steiner
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Publication number: 20030011499Abstract: A method and system for powering down an analog-to-digital converter (“ADC”) into a sleep mode are disclosed. If the ADC receives a normal set of pulses for a serial clock signal of the ADC, a serial interface controller outputs converted data requested by a user through a serial interface. Also, if the ADC receives a sleep set of pulses for the serial clock signal, a state machine of the ADC powers down the ADC into a sleep mode in which at least parts of the ADC are operated at a reduced power consumption level. Furthermore, if the ADC is in the sleep mode and the ADC receives a wake-up set of pulses for the serial clock signal, the state machine powers back up the ADC from the sleep mode.Type: ApplicationFiled: July 16, 2001Publication date: January 16, 2003Inventors: Aryesh Amar, Philip Steiner
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Patent number: 5838272Abstract: The performance of sigma delta analog to digital conversion systems is enhanced by instrumenting the modulator with an observation circuit which provides quantized estimates of the modulator's state values. These state estimates are filtered separately and the result is added to the output of the decimator. This technique lowers the noise floor of the signal band and achieves performances better than those predicted by the spectrum of the modulator output. Error Correcting is particularly well suited to very low oversampling ratios. Finally, the correction is calculated and added in the digital domain so that this technique can be employed with existing architectures with only minor modifications.Type: GrantFiled: April 17, 1997Date of Patent: November 17, 1998Assignee: President and Fellows of Harvard CollegeInventors: Philip Steiner, Woodward Yang