Abstract: The present disclosure provides processes for the preparation of a compound of formula I: which is useful as an antiviral agent. The disclosure also provides compounds that are synthetic intermediates to compounds of formula I.

Abstract: The present disclosure provides processes for the preparation of a compound of formula I: which is useful as an antiviral agent. The disclosure also provides compounds that are synthetic intermediates to compounds of formula I.

Abstract: The present disclosure provides processes for the preparation of a compound of formula I: which is useful as an antiviral agent. The disclosure also provides compounds that are synthetic intermediates to compounds of formula I.

Abstract: The present disclosure provides processes for the preparation of a compound of formula I: which is useful as an antiviral agent. The disclosure also provides compounds that are synthetic intermediates to compounds of formula I.

Abstract: The present disclosure provides processes for the preparation of a compound of formula I: which is useful as an antiviral agent. The disclosure also provides compounds that are synthetic intermediates to compounds of formula I.

Abstract: Automatically recommending workload placement in a data center. Historical data and workload constraints of a plurality of workloads are received. A plurality of resources of the data center available for placement of the plurality of workloads is identified. Resource constraints of the plurality of resources are received. Headroom ratings are assigned to the plurality of workloads based on the historical data, the workload constraints and the resource constraints. A consolidation recommendation of the plurality of workloads on the plurality of the resources in said the center is automatically generated based on an analysis of the historical data, the plurality of workloads, the plurality of available resources in the data center and the headroom ratings.

Abstract: A method for pseudo-randomly, without bias, selecting instructions for marking in a microprocessor. Responsive to reading an instruction from an instruction cache, an instruction tag associated with the instruction is compared against a pseudo-randomly generated value in a linear feedback shift register (LFSR). If the instruction tag matches the value in the LFSR, a mark bit, indicating the instruction is a marked instruction, is sent with the instruction to an execution unit. Responsive to an indication from the performance monitor, the value in the LFSR is incremented prior to selecting a next instruction to mark. If the value equals a predetermined prime number of increments, the value is reset to all ones to avoid any harmonics with the code stream being executed. Upon receiving the marked instruction, the execution unit combines the marked bit with a selected event and reports the marked event to the performance monitor.