Abstract: An amplifier circuit with internal offset cancellation receives a differential input signal and provides differentially related currents which flow through first and second conduction paths of a differential-to-signal-ended converter for providing an output signal. Although ideally the differentially related currents should be equal with a zero differential input signal, the inherent mismatches between the transistors of the amplifier produce error currents causing the offset error. During an auto-zero phase, the differential input signal is zeroed while first and second capacitors are connected to the first and second conduction paths of the differential-to-single-ended converter for storing a charge representative of the input offset voltage.

Abstract: A power field effect transistor driver circuit manufacturable in a MOS process is provided wherein a power field effect transistor provides high current drive capability for driving fractional horsepower DC motors or other inductive loads. The power field effect transistor driver circuit provides reliable operation under environmentally harsh conditions such as overvoltage transients at the supply voltage terminals, loss of ground supply terminal connection, and short circuits at the load terminal.

Abstract: An MOS SCR and MOSFET "H" switch circuit for a DC motor is provided which allows for the use of a supply voltage of greater than 20 volts by clamping the gate-to-cathode voltage of the SCR's used therein to a predetermined value which is less than the gate-to-cathode breakdown voltage of said SCR's.