Abstract: The present disclosure relates to circuit package implementations. The circuit package includes a PIC that allows for the transmission of data photonically between hardware coupled to the PIC. The circuit package further includes one or more spacers that are positioned above the PIC in a manner that allows light to pass through an optical path between the top surface of the circuit package and the PIC. Different spacers can be added to the package at different stages of the manufacturing process such that the optical path is maintained through the manufacturing of the circuit package. The circuit package having the optically accessible PIC may be implemented within the framework of a microelectronic package.

Abstract: One embodiment is a method that includes generating a request for a data item in a memory, obtaining the data item from the memory with a photonic interface, sending the data item to a fabric using a transmit unit of the photonic interface, and routing the data item through a portion of the fabric coupled to the memory, the portion of the fabric including one or more additional transmit and receive units between the photonic interface and a destination receive unit.

Abstract: Various embodiments provide for clock signal distribution within a processor, such as a machine learning (ML) processor, using a photonic fabric.

Abstract: A computing device includes a first circuit package including a first electronic integrated circuit (EIC) and a first photonic integrated circuit (PIC). The first circuit package includes a plurality of compute nodes, a first plurality of routers connected to the plurality of compute nodes, and a plurality of intra-chip bidirectional photonic channels connecting the first plurality of routers into an intra-chip network. The computing system includes a second circuit package including a second EIC and a second PIC. The second circuit package includes a plurality of memory nodes and a second plurality of routers connected to the plurality of memory nodes. The computing system includes at least one inter-chip bidirectional photonic channel connecting the first plurality of routers and the second plurality of routers into an inter-chip bidirectional photonic network configured to transmit messages between the first circuit package and the second circuit package.

Abstract: A package includes a first die with a compute element and first region, a second die with a compute element and second region, and a bridging element connecting the first and second dies. The bridging element includes interconnect regions for electrical coupling, a first photonic path from the first interconnect region to the second, and a second photonic path in the reverse direction. A photonic transceiver is integrated into the bridging element, with one portion sending and receiving optical signals via the photonic paths, and the other portion located in an AMS block in the first die or second die near the memory and compute elements. The transceiver portions are connected by a short electrical interconnect (less than 2 mm).

Abstract: A package includes a first die with a bridging element with a first interconnect region, a first photonic transceiver portion, a second interconnect region, a first photonic path to an optical interface (OI), and a second photonic path from the OI to the first photonic transceiver portion. The first interconnect region electrically couples the first photonic transceiver portion to a second photonic transceiver portion in an analog/mixed-signal die (AMS die), while the second interconnect region connects a third photonic transceiver portion in a general die to the second photonic transceiver portion using an electrical coupling embedded in the first die. The electrical interconnects in the first interconnect region are less than two millimeters in length.

Abstract: A method for processing a tensor is described including obtaining a first register for a number of items in the tensor. One or more second registers for a number of items in a first and a second axis of the tensor are obtained. A stride in the first and the second axis is obtained A next item in the tensor is obtained using the stride in the first axis and a first offset register, when the first register indicates the tensor has additional items to process and the second registers indicate the next item resides in the first axis. A next item in the tensor is obtained using the stride in the first axis and the second axis, the first offset register, and a second offset register. The first register and a second register is modified. The first and the second offset registers are modified.

Abstract: The present disclosure relates to circuit package implementations. The circuit package includes a PIC that allows for the transmission of data photonically between hardware coupled to the PIC. The circuit package further includes one or more spacers that are positioned above the PIC in a manner that allows light to pass through an optical path between the top surface of the circuit package and the PIC. Different spacers can be added to the package at different stages of the manufacturing process such that the optical path is maintained through the manufacturing of the circuit package. The circuit package having the optically accessible PIC may be implemented within the framework of a microelectronic package.

Abstract: An implementation provides a package that includes a first die including a bridging element, an analog/mixed-signal (AMS) die, and a general die. The first die includes: a first photonic transceiver portion, a first die first interconnect region, and an optical interface (OI). The AMS die includes a second photonic transceiver portion, an AMS die first interconnect region on a first surface of the AMS die electrically and physically coupled with the first die first interconnect region; and an AMS die second interconnect region on a second surface of the AMS die. The general die includes a third photonic transceiver portion, and a general die first interconnect region electrically and physically coupled with the second photonic transceiver portion.

Abstract: A package comprises a first die and a bridging element. The first die includes a compute element and/or memory element, a first region, a first portion of a photonic transceiver, and a first die interconnect region. The first region intersects a center of the first die. The first portion of a photonic transceiver includes and AMS block with a driver and transimpedance amplifier, coupled with the first die interconnect region. The bridging element includes a modulator and photodetector, connected with a bridging interconnect region. An optical interface, photonically linked with the first photonic transceiver, routes packets from an external device optical interface to the compute and/or memory element.

Abstract: A method for processing a tensor is described including obtaining a first register for a number of items in the tensor. One or more second registers for a number of items in a first and a second axis of the tensor are obtained. A stride in the first and the second axis is obtained A next item in the tensor is obtained using the stride in the first axis and a first offset register, when the first register indicates the tensor has additional items to process and the second registers indicate the next item resides in the first axis. A next item in the tensor is obtained using the stride in the first axis and the second axis, the first offset register, and a second offset register. The first register and a second register is modified. The first and the second offset registers are modified.

Abstract: An implementation provides a package that includes a first die including a bridging element, an analog/mixed-signal (AMS) die, and a general die. The first die includes: a first photonic transceiver portion, a first die first interconnect region, and an optical interface (OI). The AMS die includes a second photonic transceiver portion, an AMS die first interconnect region on a first surface of the AMS die electrically and physically coupled with the first die first interconnect region; and an AMS die second interconnect region on a second surface of the AMS die. The general die includes a third photonic transceiver portion, and a general die first interconnect region electrically and physically coupled with the second photonic transceiver portion.

Abstract: A package includes a bridging element (an OMIB), and first and second photonic paths, forming a bidirectional photonic path. The OMIB has first and second interconnect regions to connect with one or more dies. Third and fourth unidirectional photonic paths may couple between the first interconnect region and an optical interface (OI). A photonic transceiver has a first portion in the OMIB and a second portion in one of the dies. The first and the second portions may be coupled via an electrical interconnect less than 2 mm in length. The die includes compute elements around a central region, proximate to the second portion. The OMIB may include an electro-absorption modulator fabricated with germanium, silicon, an alloy of germanium, an alloy of silicon, a III-V material based on indium phosphide (InP), or a III-V material based on gallium arsenide (GaAs). The OMIB may include a temperature compensation for the modulator.

Abstract: The present disclosure relates to thermal control systems, photonic memory fabrics, and electro-absorption modulators (EAMs). For example, the thermal control systems efficiently move data in a memory fabric based on utilizing and controlling thermally controlling optical components. As another example, the EAMs are instances of optical modulators used to efficiently move data within digital circuits while maintaining thermally-stable optical modulation across a wide temperature range.

Abstract: Electro-photonic networks, including a plurality of processing elements connected by bidirectional photonic channels, suited for implementing neural-network models. Weights of the model may be preloaded into memory of the processing elements based on assignments of neural nodes to processing elements implementing them, and routers of the processing elements can be configured to stream activations between the processing elements based on a predetermined flow of activations in the model.

Abstract: A package comprises a first die and a bridging element. The first die includes a compute element and/or memory element, a first region, a first portion of a photonic transceiver, and a first die interconnect region. The first region intersects a center of the first die. The first portion of a photonic transceiver includes and AMS block with a driver and transimpedance amplifier, coupled with the first die interconnect region. The bridging element includes a modulator and photodetector, connected with a bridging interconnect region. An optical interface, photonically linked with the first photonic transceiver, routes packets from an external device optical interface to the compute and/or memory element.

Abstract: A package includes a first die with a compute element and first region, a second die with a compute element and second region, and a bridging element connecting the first and second dies. The bridging element includes interconnect regions for electrical coupling, a first photonic path from the first interconnect region to the second, and a second photonic path in the reverse direction. A photonic transceiver is integrated into the bridging element, with one portion sending and receiving optical signals via the photonic paths, and the other portion located in an AMS block in the first die or second die near the memory and compute elements. The transceiver portions are connected by a short electrical interconnect (less than 2 mm).

Abstract: A package includes a first die with a bridging element with a first interconnect region, a first photonic transceiver portion, a second interconnect region, a first photonic path to an optical interface (OI), and a second photonic path from the OI to the first photonic transceiver portion. The first interconnect region electrically couples the first photonic transceiver portion to a second photonic transceiver portion in an analog/mixed-signal die (AMS die), while the second interconnect region connects a third photonic transceiver portion in a general die to the second photonic transceiver portion using an electrical coupling embedded in the first die. The electrical interconnects in the first interconnect region are less than two millimeters in length.

Abstract: Various embodiments provide for clock signal distribution within a processor, such as a machine learning (ML) processor, using a photonic fabric.

Abstract: Various embodiments provide for electro-photonic networks, including a plurality of processing elements connected by bidirectional photonic channels, suited for implementing neural-network models. Weights of the model may be preloaded into memory of the processing elements based on assignments of neural nodes to processing elements implementing them, and routers of the processing elements can be configured to stream activations between the processing elements based on a predetermined flow of activations in the model.