Patents by Inventor Philip Yu

Philip Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220216071
    Abstract: A method includes forming regions of solder paste on a redistribution structure, wherein the solder paste has a first melting temperature; forming solder bumps on an interconnect structure, wherein the solder bumps have a second melting temperature that is greater than the first melting temperature; placing the solder bumps on the regions of solder paste; performing a first reflow process at a first reflow temperature for a first duration of time, wherein the first reflow temperature is less than the second melting temperature; and after performing the first reflow process, performing a second reflow process at a second reflow temperature for a second duration of time, wherein the second reflow temperature is greater than the second melting temperature.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 7, 2022
    Inventors: Wei-Yu Chen, Hao-Jan Pei, Hsuan-Ting Kuo, Chih-Chiang Tsao, Jen-Jui Yu, Philip Yu-Shuan Chung, Chia-Lun Chang, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Patent number: 11342321
    Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. A plurality of conductive bumps of a first package is attached to a tape carrier. A second package is coupled to the first package opposite to the plurality of conductive bumps. When coupling the second package, the plurality of conductive bumps are deformed to form a plurality of deformed conductive bumps, and a contact area between the tape carrier and the respective deformed conductive bump increases.
    Type: Grant
    Filed: January 12, 2020
    Date of Patent: May 24, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-Shuan Chung
  • Publication number: 20220144666
    Abstract: A cooling tower system is disclosed. The cooling system includes a cooling tower; at least two make-up water inlet streams configured to supply water to the cooling tower; a blowdown stream configured to remove water from the cooling tower; at least one sensor monitoring water in each of the make-up water inlet streams; and a controller operably connected to the at least one sensor.
    Type: Application
    Filed: November 11, 2020
    Publication date: May 12, 2022
    Applicant: ECOLAB USA INC.
    Inventors: Brian V. Jenkins, Craig W. Myers, Daniel L. Legereit, Emily Ann Taylor, F. Philip Yu, Bryan M. Bailiff, Michael R. Fisher, Bradley R. Goins
  • Publication number: 20220130795
    Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
  • Publication number: 20220028823
    Abstract: A method for bonding semiconductor substrates includes placing a die on a substrate and performing a heating process on the die and the substrate to bond the respective first connectors with the respective second connectors. Respective first connectors of a plurality of first connectors on the die contact respective second connectors of a plurality of second connectors on the substrate. The heating process includes placing a mask between a laser generator and the substrate and performing a laser shot. The mask includes a masking layer and a transparent layer. Portions of the masking layer are opaque. The laser passes through a first gap in the masking layer and through the transparent layer to heat a first portion of a top side of the die opposite the substrate.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 27, 2022
    Inventors: Chia-Shen Cheng, Wei-Yu Chen, Philip Yu-Shuan Chung, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu
  • Publication number: 20210351172
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Application
    Filed: July 19, 2021
    Publication date: November 11, 2021
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11069671
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: July 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20210013173
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 14, 2021
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Patent number: 10790261
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Publication number: 20200286603
    Abstract: A method includes receiving voice data from a voice-enabled device associated with a user, the voice data indicating a request for an output, determining from the voice data a current mood and/or cognitive state of the user, determining an output in response to the request, and adjusting the output and/or the form of the output according to the determined current mood and/or cognitive state of the user.
    Type: Application
    Filed: September 25, 2018
    Publication date: September 10, 2020
    Inventors: Olusola Ajilore, Alex Leow, Philip Yu, Ben Gerber, Faraz Hussain, Jun Ma
  • Publication number: 20200152616
    Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. A plurality of conductive bumps of a first package is attached to a tape carrier. A second package is coupled to the first package opposite to the plurality of conductive bumps. When coupling the second package, the plurality of conductive bumps are deformed to form a plurality of deformed conductive bumps, and a contact area between the tape carrier and the respective deformed conductive bump increases.
    Type: Application
    Filed: January 12, 2020
    Publication date: May 14, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-Shuan Chung
  • Patent number: 10544613
    Abstract: This invention is about an improved garage door opener system, with design features for preventing garage door break-in from outside of the garage using an object such as a hanger. Typically, a person pulls down a cord connected to a release handle to release emergency release of a garage door opener, allowing the door to be manually open or closed. An unauthorized person may attempt to pull down the cord using a hanger from outside the garage or to pull or push down the release handle, to open the door from outside and gain unauthorized entrance. The improved garage door opener system provides a mechanism to reverse the pulling direction of the cord and also protects release handle from being accessed from outside the garage, for increased security.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: January 28, 2020
    Inventors: Philip Yu Wing Tsui, Gallen Ka Leung Tsui
  • Patent number: 10535644
    Abstract: A manufacturing method of a package on package structure includes the following steps. A first package is provided on a tape carrier, wherein the first package includes an encapsulated semiconductor device, a first redistribution structure disposed on a first side of the encapsulated semiconductor device, and a plurality of conductive bumps disposed on the first redistribution structure and attached to the tape carrier. A second package is mounted on the first package through a plurality of electrical terminals by a thermo-compression bonding process, which deforms the conductive bumps into a plurality of deformed conductive bumps. Each of the deformed conductive bumps comprises a base portion connecting the first redistribution structure and a tip portion connecting the base portion, and a curvature of the base portion is substantially smaller than a curvature of the tip portion.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-shuan Chung
  • Publication number: 20200006308
    Abstract: A manufacturing method of a package on package structure includes the following steps. A first package is provided on a tape carrier, wherein the first package includes an encapsulated semiconductor device, a first redistribution structure disposed on a first side of the encapsulated semiconductor device, and a plurality of conductive bumps disposed on the first redistribution structure and attached to the tape carrier. A second package is mounted on the first package through a plurality of electrical terminals by a thermo-compression bonding process, which deforms the conductive bumps into a plurality of deformed conductive bumps. Each of the deformed conductive bumps comprises a base portion connecting the first redistribution structure and a tip portion connecting the base portion, and a curvature of the base portion is substantially smaller than a curvature of the tip portion.
    Type: Application
    Filed: August 9, 2018
    Publication date: January 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-shuan Chung
  • Publication number: 20190296002
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Application
    Filed: October 1, 2018
    Publication date: September 26, 2019
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20190279958
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Application
    Filed: September 5, 2018
    Publication date: September 12, 2019
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Publication number: 20180223580
    Abstract: This invention is about an improved garage door opener system, with design features for preventing garage door break-in from outside of the garage using an object such as a hanger. Typically, a person pulls down a cord connected to a release handle to release emergency release of a garage door opener, allowing the door to be manually open or closed. An unauthorized person may attempt to pull down the cord using a hanger from outside the garage or to pull or push down the release handle, to open the door from outside and gain unauthorized entrance. The improved garage door opener system provides a mechanism to reverse the pulling direction of the cord and also protects release handle from being accessed from outside the garage, for increased security.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 9, 2018
    Inventors: Philip Yu Wing TSUI, Gallen Ka Leung TSUI
  • Patent number: 9618929
    Abstract: An inventory tracking system and method for use in semiconductor manufacturing provide for generating a priority score that determines the order in which lots of substrates should be run. The priority score is generated using an algorithm that takes into account external lot priority considerations, inventory factors in the manufacturing facility, and processing tool capability factors. The processing tool capability factors include factors related to tool status and tool restrictions and the inventory factors include factors related to line balance, WIP (work-in-progress) forecasts and various downstream considerations. The priority score is generated dynamically and displayed at each processing operation for each lot that is queued for processing at the indicated operation. Various algorithms are used and different weights are assigned to many factors in calculating numerical values for several factors that combine to produce the priority score.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: April 11, 2017
    Assignee: WAFERTECH, LLC
    Inventors: Masreth Siddiqui, Philip Yu, Maria Gonchoroff, Robert Hood, Andy Brogan, Philip Hunter
  • Publication number: 20160147219
    Abstract: An inventory tracking system and method for use in semiconductor manufacturing provide for generating a priority score that determines the order in which lots of substrates should be run. The priority score is generated using an algorithm that takes into account external lot priority considerations, inventory factors in the manufacturing facility, and processing tool capability factors. The processing tool capability factors include factors related to tool status and tool restrictions and the inventory factors include factors related to line balance, WIP (work-in-progress) forecasts and various downstream considerations. The priority score is generated dynamically and displayed at each processing operation for each lot that is queued for processing at the indicated operation. Various algorithms are used and different weights are assigned to many factors in calculating numerical values for several factors that combine to produce the priority score.
    Type: Application
    Filed: November 26, 2014
    Publication date: May 26, 2016
    Inventors: Masreth SIDDIQUI, Philip YU, Maria GONCHOROFF, Robert HOOD, Andy BROGAN, Philip HUNTER
  • Patent number: D928304
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: August 17, 2021
    Inventor: Chi Wai Philip Yu