Abstract: The present disclosure provides a method of forming a semiconductor device, including loading a substrate into a process chamber; depositing a first buffer layer over the substrate; depositing a delta doping layer on the first buffer layer; depositing a second buffer layer on the delta doping layer, wherein the first buffer layer, the delta doping layer, and the second buffer layer form a buffer structure; and depositing an active structure epitaxial layer on the second buffer layer. The method of the present disclosure can be used to mitigate defects, including charge trapping, at semiconductor device interfaces, and to compensate for distortion of the electric field at the interface between the substrate and the active structure epitaxial layer.

Abstract: The invention concerns a heterojunction bipolar transistor comprising a support, and epitaxially grown from said support, at least: one collecting, respectively emitting, layer; at least one base layer; and at least one emitting, respectively collecting, layer. The collecting, respectively emitting, layer comprises: at least one first undercoat contacted with said base layer, substantially of similar composition as said emitting, respectively collecting, layer; and at least one second undercoat on the side opposite said base layer relative to said first undercoat.

Abstract: The invention concerns a heterojunction bipolar transistor comprising a support, and epitaxially grown from said support, at least: one collecting, respectively emitting, layer; at least one base layer; and at least one emitting, respectively collecting, layer. The collecting, respectively emitting, layer comprises: at least one first undercoat contacted with said base layer, substantially of similar composition as said emitting, respectively collecting, layer; and at least one second undercoat on the side opposite said base layer relative to said first undercoat.

Abstract: Electronic circuits dedicated to high frequency and high power applications based on gallium nitride (GaN) suffer from reliability problems. The main reason is a non-homogenous distribution of the electronic density in these structures that originates from alloy disorders at the atomic and micrometric scale. This invention provides processes for manufacturing semiconducting structures based on nitrides of Group III elements (Bal, Ga, In)/N which are perfectly ordered along a preferred crystalline axis. To obtain this arrangement, the ternary alloy barrier layer is replaced by a barrier layer composed of alternations of binary alloy barrier layers. The lack of fluctuation in the composition of these structures improves electron transport properties and makes the distribution more uniform.