Abstract: A circuit and method for expanding the pulse width of a signal based on the input signal's pulse width. A circuit generates a delay equal to the pulse width of the input signal for both a SHIFT and OUT signal, which are out of phase with each other. The delay is generated when a capacitor applies voltage to two control transistors in both the SHIFT and OUT blocks, reducing gate control in these transistors and generating a delay in the falling edge of these signals such that the pulse width of the SHIFT signal is reduced and the pulse width of the OUT signal is increased. The capacitor is charged by a transistor activated by the SHIFT signal. The pulse-doubling system is self-converging: when the SHIFT signal's pulse width is zero, the OUT signal's pulse width is doubled, and the capacitor's charging level is fixed since it is no longer charged by the transistor controlled by the SHIFT signal.

Abstract: A circuit and method for expanding the pulse width of a signal based on the input signal's pulse width. A circuit generates a delay equal to the pulse width of the input signal for both a SHIFT and OUT signal, which are out of phase with each other. The delay is generated when a capacitor applies voltage to two control transistors in both the SHIFT and OUT blocks, reducing gate control in these transistors and generating a delay in the falling edge of these signals such that the pulse width of the SHIFT signal is reduced and the pulse width of the OUT signal is increased. The capacitor is charged by a transistor activated by the SHIFT signal. The pulse-doubling system is self-converging: when the SHIFT signal's pulse width is zero, the OUT signal's pulse width is doubled, and the capacitor's charging level is fixed since it is no longer charged by the transistor controlled by the SHIFT signal.