Abstract: Disclosed is a method for making self-aligned metal contacts on semiconductor devices, with a submicronic spacing between regions controlled by the contacts. On a semiconductor body supporting at least one raised pattern, a double layer of SiO.sub.2 and Si.sub.3 N.sub.4 is deposited by an isotropic method. A double ionic etching of Si.sub.3 N.sub.4 by SF.sub.6 and of SiO.sub.2 by CHF.sub.3 is done to insulate the sidewalls on the flanks of the pattern. A sub-etching by HF/NH.sub.4 F/H.sub.2 O creates a cap beneath each sidewall. The metal contacts, deposited by evaporation, are self-aligned and separated by a space "d" equal to the thickness of the insulating layers.

Abstract: The aim of the method is to prevent parasitic metallizations on the lateral walls of a raised pattern, which is used to self-align the electrode metallizations in a transistor. To this effect, a pair of semiconductor materials is introduced into the vertical pattern. These semiconductor materials react differently with respect to a pair of etching methods, so that a layer of one semiconductor material is etched to a greater extent than the other layer. The overhanging feature thus created interrupts the parasitic metallizations, if any, between the electrodes. The disclosed method can be applied to vertical structures.