Patents by Inventor Philippe Grosse

Philippe Grosse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11680870
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: June 20, 2023
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20220050010
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 17, 2022
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe GROSSE, Patrick LE MAITRE, Jean-Francois CARPENTIER
  • Patent number: 11187613
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 30, 2021
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Patent number: 11131710
    Abstract: A photonic circuit testing device, including a photonic test chip including, on the side of a first surface of the chip: micropillars, each intended to be placed in contact with a corresponding electric connection pad of the photonic circuit; and first optical input/output ports, each intended to be optically coupled to a second corresponding optical input/output port of the photonic circuit.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: September 28, 2021
    Assignee: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Stéphane Bernabe, Philippe Grosse
  • Publication number: 20200256759
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe GROSSE, Patrick LE MAITRE, Jean-Francois CARPENTIER
  • Patent number: 10677684
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: June 9, 2020
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20200174067
    Abstract: A photonic circuit testing device, including a photonic test chip including, on the side of a first surface of the chip: micropillars, each intended to be placed in contact with a corresponding electric connection pad of the photonic circuit; and first optical input/output ports, each intended to be optically coupled to a second corresponding optical input/output port of the photonic circuit.
    Type: Application
    Filed: November 21, 2019
    Publication date: June 4, 2020
    Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Stéphane Bernabe, Philippe Grosse
  • Patent number: 10330865
    Abstract: A method of arranging a network of optical fiber ends opposite a corresponding network of waveguide ends of a semiconductor wafer displaceable with respect to each other in orthogonal directions X and Y, the method including: arranging the fibers so that the network ends have the same orientation and that the projection of the axis of each fiber on the wafer is parallel to direction Y; injecting, into one of the fibers, a light beam having a wavelength such that light is scattered from the fiber walls, locating the fiber axis, and displacing the fibers or the wafer in direction X to align a characteristic point in line with the projection of the fiber axis on the wafer.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: June 25, 2019
    Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Philippe Grosse, Jean-François Carpentier, Patrick Le Maitre
  • Publication number: 20190113415
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe GROSSE, Patrick LE MAITRE, Jean-Francois CARPENTIER
  • Patent number: 10247890
    Abstract: A method of adjusting the parallelism of a surface of a block of optical fibers with a surface of a semiconductor chip or wafer laid on an XY table, including the steps of: a) providing a sensor rigidly attached to the XY table and a handling arm supporting the block, said surface facing the XY table; b) for each of three non-aligned points of the surface of the block, displacing with respect to each other the XY table and the block in the X and/or Y directions to place the sensor opposite the point, and estimating, with the sensor, the distance along the Z direction between the point and the sensor; and c) modifying the orientation of the block by means of the handling arm to provide the desired parallelism.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: April 2, 2019
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventor: Philippe Grosse
  • Patent number: 10209442
    Abstract: Optical coupling of a photonic chip to an external device by use of a system with two lenses. The photonic chip comprises a light guide layer supported by a substrate and covered by an encapsulation layer, and a lens integrated into either the front face or the back face. The light guide layer includes a wave guide coupled to a surface grating coupler. An arrangement of one or several reflecting structures each on either the front face or the back face, is provided. This arrangement comprises a reflecting structure on the back face and is made so as to assure propagation of light between the surface grating coupler, and the lens along an optical path having at least one fold. The invention also covers the fabrication method of such a photonic chip.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: February 19, 2019
    Assignee: COMMISARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Sylvie Menezo, Stéphane Bernabe, Philippe Grosse
  • Patent number: 10180373
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: January 15, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20180335566
    Abstract: Optical coupling of a photonic chip to an external device by use of a system with two lenses. The photonic chip comprises a light guide layer supported by a substrate and covered by an encapsulation layer, and a lens integrated into either the front face or the back face. The light guide layer includes a wave guide coupled to a surface grating coupler. An arrangement of one or several reflecting structures each on either the front face or the back face, is provided. This arrangement comprises a reflecting structure on the back face and is made so as to assure propagation of light between the surface grating coupler, and the lens along an optical path having at least one fold. The invention also covers the fabrication method of such a photonic chip.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 22, 2018
    Inventors: Sylvie Menezo, Stéphane Bernabe, Philippe Grosse
  • Publication number: 20180267244
    Abstract: A method of arranging a network of optical fiber ends opposite a corresponding network of waveguide ends of a semiconductor wafer displaceable with respect to each other in orthogonal directions X and Y, the method including: arranging the fibers so that the network ends have the same orientation and that the projection of the axis of each fiber on the wafer is parallel to direction Y; injecting, into one of the fibers, a light beam having a wavelength such that light is scattered from the fiber walls, locating the fiber axis, and displacing the fibers or the wafer in direction X to align a characteristic point in line with the projection of the fiber axis on the wafer.
    Type: Application
    Filed: March 19, 2018
    Publication date: September 20, 2018
    Inventors: Philippe GROSSE, Jean-François CARPENTIER, Patrick LE MAITRE
  • Publication number: 20180259727
    Abstract: A method of adjusting the parallelism of a surface of a block of optical fibers with a surface of a semiconductor chip or wafer laid on an XY table, including the steps of: a) providing a sensor rigidly attached to the XY table and a handling arm supporting the block, said surface facing the XY table; b) for each of three non-aligned points of the surface of the block, displacing with respect to each other the XY table and the block in the X and/or Y directions to place the sensor opposite the point, and estimating, with the sensor, the distance along the Z direction between the point and the sensor; and c) modifying the orientation of the block by means of the handling arm to provide the desired parallelism.
    Type: Application
    Filed: March 9, 2018
    Publication date: September 13, 2018
    Inventor: Philippe Grosse
  • Publication number: 20170307687
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 26, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Patent number: 8693816
    Abstract: An optical duplexer intended to receive light at a first optical wavelength and to transmit back light at a second optical wavelength, including, on a substrate, successive layers forming a photoreceptor of the first optical wavelength, a selective filter letting through the first optical wavelength, and a waveguide having a surface including a grating which is transparent for the first optical wavelength and diffracting for the second optical wavelength.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: April 8, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Christophe Kopp, Stéphane Bernabe, Philippe Grosse
  • Publication number: 20120087621
    Abstract: An optical duplexer intended to receive light at a first optical wavelength and to transmit back light at a second optical wavelength, including, on a substrate, successive layers forming a photoreceptor of the first optical wavelength, a selective filter letting through the first optical wavelength, and a waveguide having a surface including a grating which is transparent for the first optical wavelength and diffracting for the second optical wavelength.
    Type: Application
    Filed: October 11, 2011
    Publication date: April 12, 2012
    Applicant: Commissariat a L'Energie Atomique et aux Energies Alternatives
    Inventors: Christophe KOPP, Stéphane Bernabe, Philippe Grosse
  • Patent number: 7948615
    Abstract: A non-destructive method for characterizing a surface-illuminated integrated optical coupler associated with an optical waveguide, comprising the steps of measuring the reflection coefficient on a first region of the coupler at a distance from the optical waveguide and constructing a first curve, determining a first model of the reflection coefficient on the first region, performing a first parameter fitting between the first curve and the first model to determine first parameters, measuring the reflection coefficient on a second region of the coupler close to the guide, and constructing a second curve, determining a second model of the reflection coefficient on the second region, performing a second parameter fitting between the second curve and the second model to determine second parameters, and constructing the characteristic of the coupling efficiency of the coupler using the first and second parameters.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: May 24, 2011
    Assignees: Commissariat a l'Energie Atomique, Institut National des Sciences Appliquees de Lyon
    Inventors: Christophe Kopp, Philippe Grosse, Regis Orobtchouk
  • Publication number: 20090262336
    Abstract: A non-destructive method for characterizing a surface-illuminated integrated optical coupler associated with an optical waveguide, comprising the steps of measuring the reflection coefficient on a first region of the coupler at a distance from the optical waveguide and constructing a first curve, determining a first model of the reflection coefficient on the first region, performing a first parameter fitting between the first curve and the first model to determine first parameters, measuring the reflection coefficient on a second region of the coupler close to the guide, and constructing a second curve, determining a second model of the reflection coefficient on the second region, performing a second parameter fitting between the second curve and the second model to determine second parameters, and constructing the characteristic of the coupling efficiency of the coupler using the first and second parameters.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 22, 2009
    Applicants: COMMISSARIAT A L-ENERGIE ATOMIQUE, INSTITUT NATIONAL DES SCIENCES APPLIQUEES DE LYON
    Inventors: Christophe Kopp, Philippe Grosse, Regis Orobtchouk