Abstract: A compact and fast coder-decoder of the Reed-Solomon type and a reader, which comprises such a coder-decoder. The present invention provides a coder-decoder that includes specific registers that are divided into elementary cells set in series and comprising means of multiplexing and of calculation such that during a cycle of a clock signal the data of two of the registers are shifted from one cell and a calculation operation is carried out for one of the data and it is subsequently possible to exchange simultaneously the data between the two registers.

Abstract: A Reed-Solomon type error correction device carries out correction passes, and includes a first memory containing DVD type data, as well as CD type data after a first correction pass, for deinterleaving of the CD type data before a second correction pass. Additionally, a second memory of smaller capacity than the first memory, is provided for containing CD type data before correction, as well as deinterleaved CD type data. The invention concerns the error correction device and an optical disk reader containing such a device.

Abstract: The circuit comprises two counters, one of which (A) operates at the irregular rate of asynchronous pulses applied to its count input (2), the other of which (B) operates at a regular rate which is not less than the average admissible rate for the asynchronous pulses, being clocked by an oscillator (5) providing pulses at a stable rate, a comparator (6) inhibiting the oscillator (5) each time the counter (B) catches up the counter (A) and a catch-up preventing control logic circuit (9) inhibiting the counter (A) whenever it tends to catch up the counter (B).

Abstract: The method consists of using the recovered bit rate signal to define a time window which overlaps the beginning, but not the end of each jitter range in the version of the digital train intended for use by the bit rate recovery circuit. Those transitions in said version of the digital train which occur during said window are then delayed by a fixed delay of duration less than the maximum peak-to-peak amplitude of the jitter. Other transitions are not delayed. The apparatus shown is intended to operate with a binary version I of the digital train and with a recovered bit rate signal H which is symmetrical and rectangular in shape with a first one its levels defining a time window which extends over the second half of each period in the digital train. The apparatus is essentially constituted by a pulse generator (10) which transforms the transitions in the binary version I of the digital train into pulses of duration .tau.