Abstract: Electronic modules are transported with respect to equipment for manipulating and testing electronic modules. The transport is formed from a thin support having openings for receiving electronic modules. A locating mechanism associated with the thin support serves to locate the support relative to transport and testing equipment. A mechanism is further provided for holding the received electronic modules within the openings during transport and testing.

Abstract: Electronic modules are transported with respect to equipment for manipulating and testing electronic modules. The transport is formed from a thin support having openings for receiving electronic modules. A locating mechanism associated with the thin support serves to locate the support relative to transport and testing equipment. A mechanism is further provided for holding the received electronic modules within the openings during transport and testing.

Abstract: An electrical connection device includes a platform and a moving head. Between these components a semiconductor component is received and retained. The semiconductor component includes an electrical connection plate bearing an integrated circuit chip. The platform supports the making of electrical connection with front electrical connection terminals provided on a front panel of the electrical connection plate. The moving head bears a printed circuit board having interlinked pairs of contact terminals and associated pairs of electrical connection posts which make contact between the pairs of contact terminals of the printed circuit board and rear link terminals and rear transfer terminals provided on a rear panel of the electrical connection plate. The electrical connection plate includes circuitry which electrically connects the rear link terminals to the chip and also circuitry which electrically connects rear transfer terminals to front transfer terminals.

Abstract: An electrical connection device includes a platform and a moving head. Between these components a semiconductor component is received and retained. The semiconductor component includes an electrical connection plate bearing an integrated circuit chip. The platform supports the making of electrical connection with front electrical connection terminals provided on a front panel of the electrical connection plate. The moving head bears a printed circuit board having interlinked pairs of contact terminals and associated pairs of electrical connection posts which make contact between the pairs of contact terminals of the printed circuit board and rear link terminals and rear transfer terminals provided on a rear panel of the electrical connection plate. The electrical connection plate includes circuitry which electrically connects the rear link terminals to the chip and also circuitry which electrically connects rear transfer terminals to front transfer terminals.

Abstract: A method for the calibration of an RF integrated circuit probe comprising a step to determine the characteristics of the RF transmission lines of the probe by means of a vector network analyzer and standard circuits on silicon substrate. The standard circuits comprise contact pads corresponding by their layout to RF connection pads of the integrated circuits to be tested.

Abstract: The invention relates to a method of manufacturing, on a silicon wafer, a plurality of integrated circuits and at least one test circuit, comprising steps of insulation of the silicon wafer by means of a reticle disposed in an exposure chamber provided with a diaphragm which allows to hide the non useful parts of the reticle. According to the invention, the method comprises an insulation (exposure) step performed by means of a reticle (130) comprising an insulation mask region (132) for integrated circuits together with at least one insulation mask region (133, 134, 135) for a test circuit. The insulation step includes one or more insulation steps during which the insulation mask region for test circuit is hidden by the diaphragm, and at least one insulation step during which the insulation mask region for test circuit is uncovered by the diaphragm, while all or part of the insulation mask for integrated circuit is hidden by the diaphragm.