Patents by Inventor Philippe Vandermersch

Philippe Vandermersch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240086491
    Abstract: Apparatuses, systems, and techniques to determine a matrix multiplication algorithm for a matrix multiplication operation. In at least one embodiment, a matrix multiplication operation is analyzed to determine an appropriate matrix multiplication algorithm to perform the matrix multiplication algorithm.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Piotr Majcher, Mostafa Hagog, Philippe Vandermersch
  • Publication number: 20220300578
    Abstract: Apparatuses, systems, and techniques to determine a matrix multiplication algorithm for a matrix multiplication operation. In at least one embodiment, a matrix multiplication operation is analyzed to determine an appropriate matrix multiplication algorithm to perform the matrix multiplication algorithm.
    Type: Application
    Filed: June 7, 2022
    Publication date: September 22, 2022
    Inventors: Piotr Majcher, Mostafa Hagog, Philippe Vandermersch
  • Publication number: 20210406342
    Abstract: Apparatuses, systems, and techniques to determine a matrix multiplication algorithm for a matrix multiplication operation. In at least one embodiment, a matrix multiplication operation is analyzed to determine an appropriate matrix multiplication algorithm to perform the matrix multiplication algorithm.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 30, 2021
    Inventors: Piotr Majcher, Mostafa Hagog, Philippe Vandermersch
  • Publication number: 20210256092
    Abstract: Apparatuses, systems, and techniques to determine a matrix multiplication algorithm for a matrix multiplication operation. In at least one embodiment, a matrix multiplication operation is analyzed to determine an appropriate matrix multiplication algorithm to perform the matrix multiplication algorithm.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 19, 2021
    Inventors: Piotr Majcher, Mostafa Hagog, Philippe Vandermersch
  • Patent number: 9170836
    Abstract: A system and method for re-factorizing a square input matrix on a parallel processor. In one embodiment, the system includes: (1) a matrix generator operable to generate an intermediate matrix by embedding a permuted form of the input matrix in a zeroed-out sparsity pattern of a combination of lower and upper triangular matrices resulting from a prior LU factorization of a previous matrix having a same sparsity pattern, reordering to minimize fill-in and pivoting strategy as the input matrix and (2) a re-factorizer associated with the matrix generator and operable to use parallel threads to apply an incomplete-LU factorization with zero fill-in on the intermediate matrix.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: October 27, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: Maxim Naumov, Sharanyan Chetlur, Lung Sheng Chien, Robert Strzodka, Philippe Vandermersch
  • Publication number: 20140196043
    Abstract: A system and method for re-factorizing a square input matrix on a parallel processor. In one embodiment, the system includes: (1) a matrix generator operable to generate an intermediate matrix by embedding a permuted form of the input matrix in a zeroed-out sparsity pattern of a combination of lower and upper triangular matrices resulting from a prior LU factorization of a previous matrix having a same sparsity pattern, reordering to minimize fill-in and pivoting strategy as the input matrix and (2) a re-factorizer associated with the matrix generator and operable to use parallel threads to apply an incomplete-LU factorization with zero fill-in on the intermediate matrix.
    Type: Application
    Filed: January 9, 2013
    Publication date: July 10, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Maxim Naumov, Sharanyan Chetlur, Lung Sheng Chien, Robert Strzodka, Philippe Vandermersch
  • Patent number: 7428223
    Abstract: The present invention is directed to a system and method for background noise reduction and performance improvement in conferencing. A method for providing a conferencing session may include receiving inputs from a number of participants in a conferencing session. A number of prominent inputs are determined from the received inputs and the determined prominent inputs are combined into a first output stream. The output stream is suitable for being sent to at least one participant of the number of participants in the conferencing session.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: September 23, 2008
    Assignee: Siemens Corporation
    Inventors: Florian Patrick Nierhaus, Philippe Vandermersch
  • Patent number: 7349352
    Abstract: The present invention is directed to a system and method for handling larger number of people per conference in voice conferencing over packetized networks. A method for providing a conferencing session may include receiving inputs from a number of participants in a conferencing session. The received inputs are combined into an output packet including at least two sub-packets. The sub-packets having payloads including mixed received inputs from the number of participants. The payloads of at least two of the sub-packets contain different mixed received inputs.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: March 25, 2008
    Assignee: Siemens Communications, Inc.
    Inventor: Philippe Vandermersch
  • Publication number: 20030063573
    Abstract: The present invention is directed to a system and method for handling larger number of people per conference in voice conferencing over packetized networks. A method for providing a conferencing session may include receiving inputs from a number of participants in a conferencing session. The received inputs are combined into an output packet including at least two sub-packets. The sub-packets having payloads including mixed received inputs from the number of participants. The payloads of at least two of the sub-packets contain different mixed received inputs.
    Type: Application
    Filed: January 24, 2002
    Publication date: April 3, 2003
    Inventor: Philippe Vandermersch
  • Publication number: 20030063572
    Abstract: The present invention is directed to a system and method for background noise reduction and performance improvement in conferencing. A method for providing a conferencing session may include receiving inputs from a number of participants in a conferencing session. A number of prominent inputs are determined from the received inputs and the determined prominent inputs are combined into a first output stream. The output stream is suitable for being sent to at least one participant of the number of participants in the conferencing session.
    Type: Application
    Filed: September 26, 2001
    Publication date: April 3, 2003
    Inventors: Florian Patrick Nierhaus, Philippe Vandermersch