Abstract: A method and apparatus for facilitating the contextual translation of textual entries within an interactive software application which is executable within a data processing system. A contextual translation procedure is created and inserted into a selected interactive software application. During execution of the selected interactive software application, display screens containing textual entries are typically generated. Upon encountering a screen requiring translation an operator may invoke the contextual translation procedure, causing a translation viewport to be displayed. Individual translate phrases within the display screen are then selected and displayed within the translation viewport. A contextual translation may then be entered into the translation viewport by a translator and displayed therein in proximity to the selected translatable phrase.

Abstract: A method and system for facilitating language translation of text fields within an interactive software application. A control parameter is associated with each text field within an interactive softwave application prior to translation and utilized to automatically extract each text field for translation and to reinsert a translated text field thereafter. In certain interactive software applications which utilize fixed template user-interface structures, such as dialog boxes or menu templates, the architecture will not permit captions or menu pulldown controls to be identified within the template. In such applications, an additional artificial control parameter is included within the template which contains an identifier of the text field for the caption or menu pulldown control. Thereafter, the control parameters may be utilized to automatically extract text fields for translation.

Abstract: Two different data-processing systems are interconnected into a composite system by a shared memory in the address space of each, and by a virtual channel which generates interrupts so that each system can control the other. Each system can execute standalone programs. In addition, one of them acts as an emulated terminal for the other, and also as a system console for the other.

Abstract: A line printer attachment for converting a display screen copier printer to a line printer. The last or extra line of the display is used as the line print buffer. An initiate print signal is generated upon detecting that the last or extra line is to be scanned. The initiate print signal is used to blank or inhibit the serial video data from the display screen and to enable the printer. The serial video data is constantly sent to the printer attachment but is ignored until the printer is enabled. With the printer enabled, printing takes place using the line print buffer data which has been serialized as serial video data. The print buffer data remains unchanged during the entire printing of the line where the printing is done in series of horizontal lines to complete the printing of a line. At the end of each horizontal line of print a vertical screen retrace occurs and the display screen is swept where again the last or extra line is detected and another initiate print signal is generated.

Abstract: A single chip large scale integration processor processes its own on-chip control storage array while including the ability to also address supplemental off-chip control storage and to use such off-chip supplemental storage in substitution for portions of the on-chip storage. The processor further includes simplified arithmetic and logic (ALU) circuitry wherein the adder circuit has portions selectively gated to perform other functions with a reduced logic circuit requirement. Processor function is also enhanced by providing a read only storage (ROS) array in association with the ALU to provide multiple register loading and control functions in response to certain addresses. The processor also includes memory control circuitry that permits a group of like processors to access a single, external memory on a dynamic, prioritized basis.

Abstract: A single chip large scale integration processor processes its own on-chip control storage array while including the ability to also address supplemental off-chip control storage and to use such off-chip supplemental storage in substitution for portions of the on-chip storage. The processor further includes simplified arithmetic and logic (ALU) circuitry wherein the adder circuit has portions selectively gated to perform other functions with a reduced logic circuit requirement. Processor function is also enhanced by providing a read only storage (ROS) array in association with the ALU to provide multiple register loading and control functions in response to certain addresses. The processor also includes memory control circuitry that permits a group of like processors to access a single, external memory on a dynamic, prioritized basis.

Abstract: A device control circuit is disclosed which includes the provision of control commands at precise time intervals by gating each command at a time controlled by a continuously running counter to which is added the next event delay value. Upon reaching a predetermined fixed value the next event gating signal is generated. The delay value may be entered at any time prior to the elaspe of the delay time and all gating signals are accurately time related with regard to a fixed reference and to one another.

Abstract: A microprocessor has a common data bus coupled to a storage data register, two separate storage address registers and a storage control unit. The data register transfers data to and from a storage unit addressed by that address register selected by a gating means. The address registers can be independently incremented and decremented, and perform either a read or a write operation. All these functions are specified by signals produced from a control word held in the storage control unit.