Patents by Inventor Phillip Duane Isaacs

Phillip Duane Isaacs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8287336
    Abstract: A tamper resistant enclosure for an electronic circuit includes an inner copper case, a tamper sensing mesh wrapped around the inner case, an outer copper case enclosing the inner case and the tamper sensing mesh, and a venting device forming a vent channel from inside the inner case to outside the outer case, the vent channel passing between overlapping layers of the tamper sensing mesh and having at least one right angle bend along its length. The venting device consists of two strips of a thin polyamide coverlay material laminated together along their length, and a length of wool yarn sandwiched between the two thin strips and extending from one end of the strips to the other end of the strips to form the vent channel. The length of yarn follows a zig-zag path between the first and second strips, the zig-zag path including at least one right angle bend.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: John Richard Dangler, Phillip Duane Isaacs, Arvind Kumar Sinha
  • Patent number: 7214874
    Abstract: A tamper resistant enclosure for an electronic circuit includes an inner copper case, a tamper sensing mesh wrapped around the inner case, an outer copper case enclosing the inner case and the tamper sensing mesh, and a venting device forming a vent channel from inside the inner case to outside the outer case, the vent channel passing between overlapping layers of the tamper sensing mesh and having at least one right angle bend along its length. The venting device includes two strips of a thin polyamide coverlay material laminated together along their length, and a length of wool yarn sandwiched between the two thin strips and extending from one end of the strips to the other end of the strips to form the vent channel. The length of yarn follows a zig-zag path between the first and second strips, the zig-zag path including at least one right angle bend.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: May 8, 2007
    Assignee: International Business Machines Corporation
    Inventors: John Richard Dangler, Phillip Duane Isaacs, Arvind Kumar Sinha
  • Patent number: 6572009
    Abstract: A method and apparatus for retaining heat at a pin-in-hole rework site on a printed circuit board during solder fountain rework of the board. A preheated heat retention plate is attached to the rework side of the printed circuit board. The heat retention plate covers a substantial portion of the board surface. During rework of the printed circuit board, the heat retention plate minimizes the temperature gradient between the rework site of the printed circuit board and the remainder of the printed circuit board. During the rework, the heat retention plate can be heated by an active heater in order to maintain a constant temperature gradient between the rework site of the board and the remainder of the board. By minimizing the escape of heat from the rework site, the number of solder cycles required to rework the board is decreased, resulting in reduced board rework times and increased board longevity.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: June 3, 2003
    Assignee: International Business Machines Corporation
    Inventors: Scott Peter Graves, Phillip Duane Isaacs
  • Publication number: 20020079353
    Abstract: A method and apparatus for retaining heat at a pin-in-hole rework site on a printed circuit board during solder fountain rework of the board. A preheated heat retention plate is attached to the rework side of the printed circuit board. The heat retention plate covers a substantial portion of the board surface. During rework of the printed circuit board, the heat retention plate minimizes the temperature gradient between the rework site of the printed circuit board and the remainder of the printed circuit board. During the rework, the heat retention plate can be heated by an active heater in order to maintain a constant temperature gradient between the rework site of the board and the remainder of the board. By minimizing the escape of heat from the rework site, the number of solder cycles required to rework the board is decreased, resulting in reduced board rework times and increased board longevity.
    Type: Application
    Filed: January 3, 2002
    Publication date: June 27, 2002
    Inventors: Scott Peter Graves, Phillip Duane Isaacs
  • Patent number: 6343732
    Abstract: A method and apparatus for retaining heat at a pin-in-hole rework site on a printed circuit board during solder fountain rework of the board. A preheated heat retention plate is attached to the rework side of the printed circuit board. The heat retention plate covers a substantial portion of the board surface. During rework of the printed circuit board, the heat retention plate minimizes the temperature gradient between the rework site of the printed circuit board and the remainder of the printed circuit board. During the rework, the heat retention plate can be heated by an active heater in order to maintain a constant temperature gradient between the rework site of the board and the remainder of the board. By minimizing the escape of heat from the rework site, the number of solder cycles required to rework the board is decreased, resulting in reduced board rework times and increased board longevity.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: February 5, 2002
    Assignee: International Business Machines Corporation
    Inventors: Scott Peter Graves, Phillip Duane Isaacs
  • Patent number: 6300578
    Abstract: Fine pitch area array packaging is achieved using a via-in-pad design within the area array attach portion of a printed circuit board (PCB). The limitation of the design is the wicking action, whereby solder applied to the capture pad contact surface is depleted by capillary action into the via hole when reflowed, causing insufficient solder to be present at the contact surface to effect reliable and repeatable electrical connections. In one implementation, an initial application of solder is applied to plug the via hole with a material having a higher final melting temperature than eutectic solder, thereby providing a stable plug. This plug is formed by the initial solder application that may be either a eutectic solder containing a third metal that forms intermetallic compounds, when reflowed, that elevate the liquidus temperature or a solder having a different formulation with an inherent higher melting temperature.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: October 9, 2001
    Assignee: International Business Machines Corporation
    Inventors: Mark Kenneth Hoffmeyer, Phillip Duane Isaacs
  • Patent number: 6127204
    Abstract: A electronic apparatus and a process for its manufacture are disclosed. The apparatus includes a planar card for accommodating an electronics module package having protruding solder columns and solder joints to mechanically mount and electrically connect the solder columns of the module to the planar card. The planar card includes a first side and a second side, a plurality of wiring lines forming a wiring pattern, and a plurality of vias extending at least partially through the card. Each of the vias includes at least one recessed area extending from one or both sides of the card. The recessed areas extending to a depth within the planar card sufficient to wick the solder joints, and the each of the recessed areas are shaped to provide surface tension to mechanically retain the solder joints.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: October 3, 2000
    Assignee: International Business Machines Corporation
    Inventors: Phillip Duane Isaacs, Miles Frank Swain, Connie Jean Mathison
  • Patent number: 6076726
    Abstract: Fine pitch area array packaging is achieved using a via-in-pad design within the area array attach portion of a printed circuit board (PCB). The limitation of the design is the wicking action, whereby solder applied to the capture pad contact surface is depleted by capillary action into the via hole when reflowed, causing insufficient solder to be present at the contact surface to effect reliable and repeatable electrical connections. In one implementation, an initial application of solder is applied to plug the via hole with a material having a higher final melting temperature than eutectic solder, thereby providing a stable plug. This plug is formed by the initial solder application that may be either a eutectic solder containing a third metal that forms intermetallic compounds, when reflowed, that elevate the liquidus temperature or a solder having a different formulation with an inherent higher melting temperature.
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: June 20, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mark Kenneth Hoffmeyer, Phillip Duane Isaacs
  • Patent number: 5873512
    Abstract: A method of forming a bond structure for use with integrated circuits and semiconductor electronics and carrier assemblies is disclosed. Metallurgical paste is screen printed through a stencil and the stencil is left in place during the reflow process. The melting point of the bond structure and the metallurgical paste is lower than the melting point of interconnects on the electronic components and less than the decomposition temperature of the carrier assemblies to which the electronic components are bonded.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: James Daniel Bielick, Mark Kenneth Hoffmeyer, Phillip Duane Isaacs, Thomas Donald Kidd, David Allen Sluzewski
  • Patent number: 5861663
    Abstract: A electronic apparatus and a process for its manufacture are disclosed. The apparatus includes a planar card for accommodating an electronics module package having protruding solder columns and solder joints to mechanically mount and electrically connect the solder columns of the module to the planar card. The planar card includes a first side and a second side, a plurality of wiring lines forming a wiring pattern, and a plurality of vias extending at least partially through the card. Each of the vias includes at least one recessed area extending from one or both sides of the card. The recessed areas extending to a depth within the planar card sufficient to wick the solder joints, and the each of the recessed areas are shaped to provide surface tension to mechanically retain the solder joints.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: January 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: Phillip Duane Isaacs, Miles Frank Swain, Connie Jean Mathison
  • Patent number: 5806753
    Abstract: A method of forming a bond structure for use with integrated circuits and semiconductor electronics and carrier assemblies is disclosed. Metallurgical paste is screen printed through a stencil and the stencil is left in place during the reflow process. The melting point of the bond structure and the metallurgical paste is lower than the melting point of interconnects on the electronic components and less than the decomposition temperature of the carrier assemblies to which the electronic components are bonded.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: September 15, 1998
    Assignee: International Business Machines Corporation
    Inventors: James Daniel Bielick, Mark Kenneth Hoffmeyer, Phillip Duane Isaacs, Thomas Donald Kidd, David Allen Sluzewski
  • Patent number: 5789930
    Abstract: The present invention may be characterized as an improved integrated circuit die testing system which includes a number of components which cooperate together. An integrated circuit carrier is provided for holding the integrated circuit die. Attached to the integrated circuit carrier is a chip site. Proximate to this chip site exists a plurality of contact pads. These contact pads are electrically coupled to a plurality of test points. Also provided is an integrated circuit die. Finally, a pattern of electrically conductive paste is provided. This electrically conductive paste electrically couples the integrated circuit die and the contact pads thereby allowing the integrated circuit die to be tested from the test points.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: August 4, 1998
    Assignee: International Business Machine Corporation
    Inventors: Phillip Duane Isaacs, David Allen Sluzewski, Mark Kenneth Hoffmeyer