Patents by Inventor Phillip F. Chapman

Phillip F. Chapman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10978452
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: April 13, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20190081046
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: November 16, 2018
    Publication date: March 14, 2019
    Inventors: Phillip F. CHAPMAN, David S. COLLINS, Steven H. VOLDMAN
  • Patent number: 10170476
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20180040619
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: October 10, 2017
    Publication date: February 8, 2018
    Inventors: Phillip F. CHAPMAN, David S. COLLINS, Steven H. VOLDMAN
  • Patent number: 9842838
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: December 12, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20160268258
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: May 24, 2016
    Publication date: September 15, 2016
    Inventors: Phillip F. CHAPMAN, David S. COLLINS, Steven H. VOLDMAN
  • Patent number: 9397010
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: July 19, 2016
    Assignee: International Business Machines Corporation
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20160126147
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: January 12, 2016
    Publication date: May 5, 2016
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Patent number: 9275997
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Patent number: 8987067
    Abstract: Disclosed are guard ring structures with an electrically insulated gap in a substrate to reduce or eliminate device coupling of integrated circuit chips, methods of manufacture and design structures. The method includes forming a guard ring structure comprising a plurality of metal layers within dielectric layers. The method further includes forming diffusion regions to electrically insulate a gap in a substrate formed by segmented portions of the guard ring structure.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Barry, Phillip F. Chapman, Jeffrey P. Gambino, Michael L. Gautsch, Mark D. Jaffe, Kevin N. Ogg, Bradley A. Orner
  • Publication number: 20150035112
    Abstract: Disclosed are guard ring structures with an electrically insulated gap in a substrate to reduce or eliminate device coupling of integrated circuit chips, methods of manufacture and design structures. The method includes forming a guard ring structure comprising a plurality of metal layers within dielectric layers. The method further includes forming diffusion regions to electrically insulate a gap in a substrate formed by segmented portions of the guard ring structure.
    Type: Application
    Filed: October 22, 2014
    Publication date: February 5, 2015
    Inventors: Robert L. BARRY, Phillip F. CHAPMAN, Jeffrey P. GAMBINO, Michael L. GAUTSCH, Mark D. JAFFE, Kevin N. OGG, Bradley A. ORNER
  • Publication number: 20140367792
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 18, 2014
    Inventors: Phillip F. CHAPMAN, David S. COLLINS, Steven H. VOLDMAN
  • Patent number: 8853789
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20140246752
    Abstract: Disclosed are guard ring structures with an electrically insulated gap in a substrate to reduce or eliminate device coupling of integrated circuit chips, methods of manufacture and design structures. The method includes forming a guard ring structure comprising a plurality of metal layers within dielectric layers. The method further includes forming diffusion regions to electrically insulate a gap in a substrate formed by segmented portions of the guard ring structure.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert L. Barry, Phillip F. Chapman, Jeffrey P. Gambino, Michael L. Gautsch, Mark D. Jaffe, Kevin N. Ogg, Bradley A. Orner
  • Patent number: 8420518
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Patent number: 8017471
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20110198703
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: April 27, 2011
    Publication date: August 18, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phillip F. CHAPMAN, David S. COLLINS, Steven H. VOLDMAN
  • Publication number: 20100032767
    Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 11, 2010
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Publication number: 20090166798
    Abstract: A design structure is disclosed for a circuit optimizing guard ring design by optimizing the path resistance value between the components of the parasitic lateral bipolar transistors in a CMOS circuit and the power supply or ground. By comparing the calculated path resistance value to a maximum resistance number derived from specifications, elements that need further redesign are identified. Repeated redesign with several redesign options eventually lead to an optimized guard ring structure that provides area-efficient and sufficient latchup protection for the CMOS circuit. A design structure employing such an optimized guard ring is also provided.
    Type: Application
    Filed: December 26, 2007
    Publication date: July 2, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman
  • Patent number: 7549135
    Abstract: A design methodology is disclosed for optimizing guard ring design by optimizing the guard ring to power supply path resistance value between physical and/or virtual injection sources in a CMOS circuit and the corresponding power supply. By comparing the calculated guard ring to power supply path resistance value to resistance criteria derived from specifications, elements that need further redesign are identified. Repeated redesign with several redesign options eventually lead to an optimized guard ring structure that provides area-efficient and sufficient latchup protection for the CMOS circuit.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: June 16, 2009
    Assignee: International Business Machines Corporation
    Inventors: Phillip F. Chapman, David S. Collins, Steven H. Voldman