Abstract: An imager comprising a sphere of dielectric material and a geodesically configured substrate disposed adjacent said sphere. The geodesically configured substrate comprises a plurality of triangularly shaped elements, at least selected ones of the triangularly shaped elements having an array of detectors disposed thereon, the detectors in the array also being disposed adjacent the dielectric sphere for receiving and detecting incoming electromagnetic waves delivered via said sphere.

Abstract: An imager comprising a sphere of dielectric material and a geodesically configured substrate disposed adjacent said sphere. The geodesically configured substrate comprises a plurality of triangularly shaped elements, at least selected ones of the triangularly shaped elements having an array of detectors disposed thereon, the detectors in the array also being disposed adjacent the dielectric sphere for receiving and detecting incoming electromagnetic waves delivered via said sphere.

Abstract: A method for fabrication of a solder bump, comprising applying preferably an insulating film, followed by applying a multilayer underbump metallization, a layer of a photoresist, and a thin layer of titanium on a substrate containing, preferably, III-V semiconductor circuits. The multilayer UBM pad, preferably comprising a 0.02 to 0.05 micrometer thick layer of titanium, a 0.5 to 1.0 micrometer thick layer of nickel and a 0.1 to 0.2 thick layer of gold. The protective film with the thickness of preferably 0.5 to 40 micrometer comprises a photoresist. After the solder has been electroplated, the protective film is removed, preferably by dry etching or with a solvent. The titanium film serves a dual function of being a membrane for electroplating of the solder and of being a non-wettable dam for wetting back of the plated solder. The titanium film with the thickness of 200 to 1,000 Angstroms is preferably deposited by evaporation.

Abstract: A method for fabrication of a solder bump, comprising applying preferably an insulating film, followed by applying a multilayer underbump metallization, a layer of a photoresist, and a thin layer of titanium on a substrate containing, preferably, III-V semiconductor circuits. The multilayer UBM pad, preferably comprising a 0.02 to 0.05 micrometer thick layer of titanium, a 0.5 to 1.0 micrometer thick layer of nickel and a 0.1 to 0.2 thick layer of gold. The protective film with the thickness of preferably 0.5 to 40 micrometer comprises a photoresist. After the solder has been electroplated, the protective film is removed, preferably by dry etching or with a solvent. The titanium film serves a dual function of being a membrane for electroplating of the solder and of being a non-wettable dam for wetting back of the plated solder. The titanium film with the thickness of 200 to 1,000 Angstroms is preferably deposited by evaporation.

Abstract: A low cost highly integrated method of fabricating a heat sink on the backside of a power semiconductor device maintains device performance, improves thermal transfer, and enables reliable planar connections without having to dice the wafer or package the discrete device-heat sink assembly. An etch stop layer is formed between the wafer and the frontside power devices to protect them during backside processing and to reduce the contact resistance between the device and its heat sink. The heat sinks are formed by thinning, patterning and then plating the wafer in such a manner that the devices can be released without dicing. The heat sinks are preferably oversized so that a vacuum tool can grasp the heat sink from above without damaging the device and then compression bond the heat sink onto a planar microstrip circuit assembly, which is designed and packaged to facilitate easy replacement of failed devices.

Abstract: A low cost highly integrated method of fabricating a heat sink on the backside of a power semiconductor device maintains device performance, improves thermal transfer, and enables reliable planar connections without having to dice the wafer or package the discrete device-heat sink assembly. An etch stop layer is formed between the wafer and the frontside power devices to protect them during backside processing and to reduce the contact resistance between the device and its heat sink. The heat sinks are formed by thinning, patterning and then plating the wafer in such a manner that the devices can be released without dicing. The heat sinks are preferably oversized so that a vacuum tool can grasp the heat sink from above without damaging the device and then compression bond the heat sink onto a planar microstrip circuit assembly, which is designed and packaged to facilitate easy replacement of failed devices.