Patents by Inventor Phillip H. Tai

Phillip H. Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pattern-based power-and-ground (PG) routing and via creation
    Patent number: 10204203
    Abstract: Systems and techniques for pattern-based power-and-ground (PG) routing and via rule based via creation are described. A pattern for routing PG wires can be received. Next, an instantiation strategy may be received, wherein the instantiation strategy specifies an area of an integrated circuit (IC) design layout where PG wires based on the pattern are to be instantiated and specifies one or more net identifiers that are to be assigned to the instantiated PG wires. The PG wires can be instantiated in the IC design layout based on the pattern and the instantiation strategy. Additionally, a set of via rules can be received, wherein each via rule specifies a type of via that is to be instantiated at an intersection between two PG wires that are in two different metal layers. Next, one or more vias can be instantiated in the IC design layout based on the set of via rules.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: February 12, 2019
    Assignee: Synopsys, Inc.
    Inventors: Yan Lin, Yi-Min Jiang, Phillip H. Tai, Lin Yuan
  • PATTERN-BASED POWER-AND-GROUND (PG) ROUTING AND VIA CREATION
    Publication number: 20140189629
    Abstract: Systems and techniques for pattern-based power-and-ground (PG) routing and via rule based via creation are described. A pattern for routing PG wires can be received. Next, an instantiation strategy may be received, wherein the instantiation strategy specifies an area of an integrated circuit (IC) design layout where PG wires based on the pattern are to be instantiated and specifies one or more net identifiers that are to be assigned to the instantiated PG wires. The PG wires can be instantiated in the IC design layout based on the pattern and the instantiation strategy. Additionally, a set of via rules can be received, wherein each via rule specifies a type of via that is to be instantiated at an intersection between two PG wires that are in two different metal layers. Next, one or more vias can be instantiated in the IC design layout based on the set of via rules.
    Type: Application
    Filed: March 22, 2013
    Publication date: July 3, 2014
    Applicant: Synopsys, Inc.
    Inventors: Yan Lin, Yi-Min Jiang, Phillip H. Tai, Lin Yuan