Patents by Inventor Phillip Krueger

Phillip Krueger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Point to node in a multi-tiered middleware environment
    Patent number: 11924273
    Abstract: Systems and methods directing requests to a particular node in a multi-tiered middleware environment are provided. In one embodiment, traffic requests can be dynamically routed to a desired server, and not be load balanced, based on an identification of the client generating the traffic requests.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: March 5, 2024
    Assignee: United Services Automobile Association (USAA)
    Inventors: Clayton Krueger, Phillip Schwesinger
  • System and method for updating data in a cache
    Patent number: 9519584
    Abstract: In one embodiment, a computing system includes a cache having one or more memories and a cache manager. The cache manager is able to receive a request to write data to a first portion of the cache, write the data to the first portion of the cache, update a first map corresponding to the first portion of the cache, receive a request to read data from the first portion of the cache, read from a storage communicatively linked to the computing system data according to the first map, and update a second map corresponding to the first portion of the cache. The cache manager may also be able to write data to the storage according to the first map.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: December 13, 2016
    Assignee: Dell Products L.P.
    Inventors: Scott David Peterson, Gus Shaffer, Phillip Krueger
  • Striping cache blocks with logical block address scrambling
    Patent number: 9519546
    Abstract: A method for information handling systems includes receiving a storage operation to be applied to a cache block in a location in a distributed storage system. The location is defined by a logical block address (LBA). The method further includes swapping a first portion of the LBA with a second portion of the LBA, resulting in a modified LBA, and performing the storage operation with the modified LBA. The first portion and the second portion are both x bits wide.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: December 13, 2016
    Assignee: Dell Products L.P.
    Inventors: Scott Peterson, Phillip Krueger
  • STRIPING CACHE BLOCKS WITH LOGICAL BLOCK ADDRESS SCRAMBLING
    Publication number: 20150261615
    Abstract: A method for information handling systems includes receiving a storage operation to be applied to a cache block in a location in a distributed storage system. The location is defined by a logical block address (LBA). The method further includes swapping a first portion of the LBA with a second portion of the LBA, resulting in a modified LBA, and performing the storage operation with the modified LBA. The first portion and the second portion are both x bits wide.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 17, 2015
    Inventors: Scott Peterson, Phillip Krueger