Patents by Inventor Phillip Leef

Phillip Leef has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8700832
    Abstract: A method for adding file based storage hardware to a block based storage system includes detecting, by the file based storage hardware, an electrical coupling between the file based storage hardware and the block based storage system, the block based storage system having a set of logical units (LUs) predefined as file based storage hardware specific LUs. The method includes forwarding, by the file based storage hardware, an initiator record to the block based storage system, the initiator record configured to control access by the file based storage hardware to data stored by the block based storage system and the initiator record having a file based storage hardware specific identifier. The method includes, following the block based storage system associating the initiator record having the file based storage hardware specific identifier with the predefined file based storage hardware specific LUs, establishing a communication path with the block based storage system.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: April 15, 2014
    Assignee: EMC Corporation
    Inventors: Ashok Ramakrishnan, Mohamed Elayouty, Phillip Leef, Russell R. Laporte, Ping He
  • Patent number: 8089903
    Abstract: A data storage system includes storage array and a switch that is configurable to create numerous network topologies within the system and to maintain separate communications paths between different computerized devices or networks and the storage array. For example, a user device and a service device, such as a system diagnosis device, can connect to the storage array through the switch. In order to isolate interaction or communication between the user and service devices, the switch can be logically partitioned into two distinct switches to form two distinct, isolated communications paths between the devices and the storage array. With isolated communications pathways established in the switch, in use, the service device is unable to access the user device coupled to the storage array.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: January 3, 2012
    Assignee: EMC Corporation
    Inventors: Phillip Leef, Douglas Sullivan, Matthew Ferson
  • Patent number: 7778244
    Abstract: A system for management of storage devices includes compatibility with either or both of COM/RS232 port and USB port connectivity using, for example, Fibre Channel (FC) signal transmission. A USB to serial RS232 bridge device allows a storage processor (SP) to communicate with an COM/RS232 port of a universal asynchronous receiver/transmitter (UART) coupled to downstream disk array enclosures (DAEs) to provide DAE management information without the need to modify the connection of the switch to the DAEs, which may include FC interconnects. The output from an COM/RS232 port on an SP interface and the RS232 output on the USB to Serial bridge device may be muxed at the UART, and the output signal therefrom diplexed with a high frequency differential signal and transmitted to one or more of the downstream DAEs as an FC diplexed signal.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: August 17, 2010
    Assignee: EMC Corporation
    Inventors: Rizwan Sheikh, Stephen Edward Strickland, Phillip Leef
  • Patent number: 7502992
    Abstract: A data storage system includes a storage processor that is configured to perform load and store operations on a storage array on behalf of external devices. The data storage system also includes a controller that isolates communication between the external devices when coupled to the storage array via the storage processor. The controller further maintains a set of registers that store information associated with the data storage system and allows the storage processor to access the register via an I2C bus. The system utilizes an error detection procedure to allow detection of errors in the data transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting in transmission of the data by the I2C bus.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 10, 2009
    Assignee: EMC Corporation
    Inventors: Phillip Leef, Douglas Sullivan, Stephen Strickland, Alex Sanville
  • Publication number: 20070237158
    Abstract: A data storage system includes storage array and a switch that is configurable to create numerous network topologies within the system and to maintain separate communications paths between different computerized devices or networks and the storage array. For example, a user device and a service device, such as a system diagnosis device, can connect to the storage array through the switch. In order to isolate interaction or communication between the user and service devices, the switch can be logically partitioned into two distinct switches to form two distinct, isolated communications paths between the devices and the storage array. With isolated communications pathways established in the switch, in use, the service device is unable to access the user device coupled to the storage array.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 11, 2007
    Applicant: EMC Corporation
    Inventors: Phillip Leef, Douglas Sullivan, Matthew Ferson
  • Publication number: 20070234136
    Abstract: A data storage system includes a storage processor that is configured to perform load and store operations on a storage array on behalf of external devices. The data storage system also includes a controller that isolates communication between the external devices when coupled to the storage array via the storage processor. The controller further maintains a set of registers that store information associated with the data storage system and allows the storage processor to access the register via an I2C bus. The system utilizes an error detection procedure to allow detection of errors in the data transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting in transmission of the data by the I2C bus.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 4, 2007
    Applicant: EMC Corporation
    Inventors: Phillip Leef, Douglas Sullivan, Stephen Strickland, Alex Sanville