Abstract: In a computer system having a device and a communications link for communicating with the device. A method for dynamically managing power consumption by the computer system comprises associating a particular device identifier with the device. Communications are monitored over the communications link to determine whether the communications include the particular device identifier. A clock input is withheld from the device when the communications do not include the particular device identifier. Clock input is provided to the device only when the communications include the particular device identifier. The clock input causes the device to transition from a non-operational power conservative state to an operational state wherein the device consumes more power than in the non-operational state. A performance requirement is established for a task to be executed. Clock frequency is dynamically controlled according to the performance requirement established for the task being executed.

Abstract: A dual-edge FIFO interface having a host FIFO interface operative to receive data from a host module on a single edge of a host clock, and determine situations when valid read data is present in a read data FIFO or when the read data FIFO is full, a target FIFO interface operative to receive read data from a target core module, transfer data out, and determine when the read data FIFO is full, and a register block in communication with the host FIFO and the target FIFO, wherein the dual-edge FIFO interface is operative to interconnect internal modules at a core logic level, a block level, or a chip level.

Abstract: In a computer system having a device and a communications link for communicating with the device. A method for dynamically managing power consumption by the computer system comprises associating a particular device identifier with the device. Communications are monitored over the communications link to determine whether the communications include the particular device identifier. A clock input is withheld from the device when the communications do not include the particular device identifier. Clock input is provided to the device only when the communications include the particular device identifier. The clock input causes the device to transition from a non-operational power conservative state to an operational state wherein the device consumes more power than in the non-operational state. A performance requirement is established for a task to be executed. Clock frequency is dynamically controlled according to the performance requirement established for the task being executed.

Abstract: A data processing system including a central processing unit and control circuitry on a single chip connected by a common bus to two or more bus devices having different sets of bus parameters. A first set of bus parameters functions as a memory bus for transfers to and from main memory, a second set of bus parameters functions as an I/O bus for I/O device transfers and a third set of bus parameters functions as a video bus for transfers to a video display. Each set of bus parameters has different timing selected to maximize transfers for the particular bus function (main memory, I/O, video or other) implemented by the bus parameters.