Abstract: A charge-coupled device camera architecture for improving the dynamic range of the charge-coupled device camera having a charge-coupled device camera contained within a vacuum capable camera case and electrically attached to the outside of the camera case; a thermoelectric cooler thermally attached to a back side of the charge-coupled device camera and electrically attached to the outside of the camera case; a thermal redistribution block thermally attached to the thermoelectric cooler and further thermally attached to the camera case; a pressure measuring mechanism attached to an inside surface of the camera case and electrically connected to the outside of the camera case; a temperature measuring mechanism attached to a surface of the thermal redistribution block and electrically connected to the outside of the camera case; and a vacuum evacuation assembly having an indium lined copper pinch tube.

Abstract: A buckle made from a non-metallic and non-magnetic polymer having a minimum flexural strength of 120 MPa wherein the buckle comprises a frame, a bar attached to the frame, and a prong pivotally attached to the bar, the frame has first and second terminal ends, the first terminal end has a first aperture that extends through the first terminal end, the first aperture extends in the plane of the frame and parallel to a back side of the frame, the second terminal end has a second aperture that extends through the second terminal end, the second aperture extends in the plane of the frame and parallel to a back side of the frame, the bar further comprises a main shaft with a first threaded end and a second drive end, the first threaded end is threaded only along portion of the length of the main shaft.

Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.

Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.

Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.

Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.

Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.

Abstract: A method for improving the electrical resistance of contacts on an integrated circuit. The method includes the steps of first exposing the contacts to a solvent, thereby removing organic contaminants; and then exposing the contacts to ion bombardment, thereby removing inorganic contaminants. The step of exposing the contacts to ion bombardment can remove a portion of the contact. The method may also include a step of oxidizing the pad to produce an oxide layer of a predetermined thickness. The ion bombardment can be carried out in a parallel plate etch tool or by using the RIE tool used to carry out a previous etch step. Another embodiment of the invention is a method of improving the resistance of contacts on an integrated circuit including the steps of: exposing the contacts to ion bombardment in the presence of a fluorine and oxygen plasma, thereby removing inorganic contaminants; and exposing the contacts to a solvent, thereby removing organic contaminants.

Abstract: An organically modified dielectric network structure (208) and solid halide-containing material (206) are co-deposited using a chemical vapor deposition process. The solid halide-containing material (206) is then sublimated leaving a porous dielectric (212). An encapsulating layer (210) is formed over the porous dielectric (212) to seal any remaining halide-containing material Within the porous dielectric (212).

Abstract: A process for creating and an apparatus employing reentrant (pointing or directed inward) shaped orifices in a semiconductor substrate. A layer of graded dielectric material is deposited on the semiconductor substrate. A masked photoimagable material is deposited upon the graded dielectric material and exposed to electromagnetic energy such that a patterned photoimagable material is created. The patterned photoimagable material is developed to unveil the graded dielectric material which is then anisotropically etched. The bore in the graded dielectric material is then isotropically etched to complete the creation of holes in the substrate.

Abstract: A process for creating and an apparatus employing reentrant (pointing or directed inward) shaped orifices in a semiconductor substrate. A layer of graded dielectric material is deposited on the semiconductor substrate. A masked photoimagable material is deposited upon the graded dielectric material and exposed to electromagnetic energy such that a patterned photoimagable material is created. The patterned photoimagable material is developed to unveil the graded dielectric material which is then anisotropically etched. The bore in the graded dielectric material is then isotropically etched to complete the creation of holes in the substrate.

Abstract: A process for creating and an apparatus employing reentrant (pointing or directed inward) shaped orifices in a semiconductor substrate. A layer of graded dielectric material is deposited on the semiconductor substrate. A masked photoimagable material is deposited upon the graded dielectric material and exposed to electromagnetic energy such that a patterned photoimagable material is created. The patterned photoimagable material is developed to unveil the graded dielectric material which is then anisotropically etched. The bore in the graded dielectric material is then isotropically etched to complete the creation of holes in the substrate.