Abstract: A circuit includes a first clock having a first clock output and a second clock having a second clock output. The circuit also includes a first buffer having a first buffer input, a second buffer input, and a first buffer output, the second buffer input coupled to the first clock output and a second buffer having a third buffer input, a fourth buffer input, and a second buffer output, the third buffer input coupled to the first buffer output and the fourth buffer input coupled to the second clock output. Additionally, the circuit includes a first element of data memory having a first data input and a first data output, the first data input coupled to the first buffer output and a second element of data memory having a second data input and a second data output, the second data input coupled to the second buffer output.

Abstract: Method and apparatus for matched buffer decompression. In some examples, a circuit comprising a first data element, a second data element, a first buffer coupled to the first data element, a second buffer coupled to the second data element, compression override logic circuits coupled to the first data element and the second data element, and a parallel register coupled to the compression override logic circuits.

Abstract: In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.

Abstract: An example apparatus includes a multiplexer; a first memory coupled to the multiplexer; a second memory coupled to the multiplexer, the second memory including a bi-level reset indicator, a multi-level reset indicator, and a duration indicator; a memory controller coupled to the multiplexer; and waveform generation circuitry coupled to the memory controller, the waveform generation circuitry including: a first power supply configured to receive the bi-level reset indicator; a second power supply configured to receive the multi-level reset indicator; and timing circuitry configured to receive the duration indicator.

Abstract: In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.

Abstract: In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.

Abstract: Method and apparatus for matched buffer decompression. In some examples, a circuit comprising a first data element, a second data element, a first buffer coupled to the first data element, a second buffer coupled to the second data element, compression override logic circuits coupled to the first data element and the second data element, and a parallel register coupled to the compression override logic circuits.

Abstract: A method for reducing contaminants during synthesis of pentachlorophenol includes providing a phenol-based starting material and a catalyst, which form a reaction mixture. A chlorine flow is introduced so that it is in contact with the reaction mixture, and the starting material and chlorine are reacted via a temperature-programmed reaction. The chlorine flow is terminated at a predetermined temperature prior to an end of the temperature-programmed reaction and/or at a point where the yield of pentachlorophenol is less than about 95%.