Patents by Inventor Phillip Sean Stetson

Phillip Sean Stetson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8629011
    Abstract: A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: January 14, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Brett M. Diamond, Franz Laermer, Andrew J. Doller, Michael J. Daley, Phillip Sean Stetson, John M. Muza
  • Publication number: 20120319219
    Abstract: A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.
    Type: Application
    Filed: June 15, 2011
    Publication date: December 20, 2012
    Applicant: ROBERT BOSCH GMBH
    Inventors: Brett M. Diamond, Franz Laermer, Andrew J. Doller, Michael J. Daley, Phillip Sean Stetson, John M. Muza
  • Patent number: 6552614
    Abstract: An upstream programmable gain amplifier (PGA) (114, 214) for a cable modem (100) having a programmable bias current. PGA (114, 214) includes a bias current-setting circuit (140, 240) coupled to a power amplifier stage (136, 236), the bias current-setting circuit (140, 240) adapted to program the bias current Ibias of the power amplifier stage (136, 236). The bias current-setting circuit (140) includes a bandgap generator (130, 230) having an external bias resistor R1 at the input. The bias current-setting circuit (140) may include a variable gain amplifier (VGA) (134), a digital-to-analog converter (DAC) (132), and a bias code generator (138). The bias current-setting circuit (240) may alternatively include a plurality of programmable resistors R1a, R1b . . . R1x coupled to a bias code generator (238).
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: April 22, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Phillip Sean Stetson, Neil Gibson, Marco Corsi, Jim Quarfoot