Patents by Inventor Phillip V. Nguyen

Phillip V. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8898385
    Abstract: Methods and structure for load balancing of background tasks between storage controllers are provided. An exemplary active storage controller comprises a front-end interface that receives host Input/Output (I/O) requests directed to a logical volume, a back-end interface that couples with one or more of storage devices provisioning the logical volume, and a control unit. The control unit processes the host I/O requests directed to the logical volume, identifies a background processing task distinct from the host I/O requests and related to the logical volume, and assigns the background processing task to a passive storage controller for processing.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: November 25, 2014
    Assignee: LSI Corporation
    Inventors: Raja Jayaraman, James A. Rizzo, Rakesh Chandra, Vinu Velayudhan, Phillip V. Nguyen
  • Patent number: 8793443
    Abstract: Methods and structure for improved buffer management in a storage controller. A plurality of processes in the controller each transmits buffer management requests to buffer management control logic. A plurality of reserved portions and a remaining non-reserved portion are defined in a shared pool memory managed by the buffer management control logic. Each reserved portion is defined as a corresponding minimum amount of memory of the shared pool. Each reserved portion is associated with a private pool identifier. Each allocation request from a client process supplies a private pool identifier for the associated buffer to be allocated. The buffer is allocated from the reserved portion if there sufficient available space in the reserved portion identified by the supplied private pool identifier. Otherwise, the buffer is allocated if sufficient memory is available in the non-reserved portion. Otherwise the request is queued for later re-processing.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: July 29, 2014
    Assignee: LSI Corporation
    Inventors: James A. Rizzo, Vinu Velayudhan, Adam Weiner, Rakesh Chandra, Phillip V. Nguyen
  • Publication number: 20130067172
    Abstract: Methods and structure for improved buffer management in a storage controller. A plurality of processes in the controller each transmits buffer management requests to buffer management control logic. A plurality of reserved portions and a remaining non-reserved portion are defined in a shared pool memory managed by the buffer management control logic. Each reserved portion is defined as a corresponding minimum amount of memory of the shared pool. Each reserved portion is associated with a private pool identifier. Each allocation request from a client process supplies a private pool identifier for the associated buffer to be allocated. The buffer is allocated from the reserved portion if there sufficient available space in the reserved portion identified by the supplied private pool identifier. Otherwise, the buffer is allocated if sufficient memory is available in the non-reserved portion. Otherwise the request is queued for later re-processing.
    Type: Application
    Filed: March 28, 2012
    Publication date: March 14, 2013
    Applicant: LSI CORPORATION
    Inventors: James A. Rizzo, Vinu Velayudhan, Adam Weiner, Rakesh Chandra, Phillip V. Nguyen
  • Publication number: 20130067162
    Abstract: Methods and structure for load balancing of background tasks between storage controllers are provided. An exemplary active storage controller comprises a front-end interface that receives host Input/Output (I/O) requests directed to a logical volume, a back-end interface that couples with one or more of storage devices provisioning the logical volume, and a control unit. The control unit processes the host I/O requests directed to the logical volume, identifies a background processing task distinct from the host I/O requests and related to the logical volume, and assigns the background processing task to a passive storage controller for processing.
    Type: Application
    Filed: March 28, 2012
    Publication date: March 14, 2013
    Applicant: LSI CORPORATION
    Inventors: Raja Jayaraman, James A. Rizzo, Rakesh Chandra, Vinu Velayudhan, Phillip V. Nguyen
  • Publication number: 20030110357
    Abstract: A method for replacing disk memory blocks in a cache when a cache miss occurs. A weighting factor is accumulated for each disk memory block which is representative of the number of hits the disk memory block receives. To improve access time, the cache is divided into three buffer segments. The information resides in these buffers based on frequency of access. Upon a cache miss, new data is inserted at the top position of the first buffer, extra data from the bottom of the first buffer is migrated to the top position of the second buffer and extra data from the bottom position of the second buffer is migrated to the top position of the third buffer. The extra data in the third buffer is evicted based on both recentness and frequency of usage. For a cache hit, the weighting factor is augmented and the disk memory block is moved to the top position of the first buffer.
    Type: Application
    Filed: November 14, 2001
    Publication date: June 12, 2003
    Inventors: Phillip V. Nguyen, Archana Sathaye