Patents by Inventor Phillipe Dupuy

Phillipe Dupuy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Field effect transistor having differing power dissipation across an array of transistors
    Patent number: 6603157
    Abstract: A field effect transistor (30) has an array of transistors (31) made up of bonding pads (45-47) and sub-arrays of transistors (41-43). The bonding pads (45-47) are distributed between the sub-arrays of transistors (41-43) to reduce the maximum temperature that any portion of the FET (30) is exposed to while the FET (30) is in a conducting state. A similar effect can be appreciated by adjusting the threshold voltage or pinch-off resistance of the transistors in a portion (101) of an array of transistors (95).
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: August 5, 2003
    Assignee: Motorola, Inc.
    Inventors: Phillipe Dupuy, Steven L. Merchant, Robert W. Baird
  • Field effect transistor and method of making
    Patent number: 6423991
    Abstract: A field effect transistor (30) has an array of transistors (31) made up of bonding pads (45-47) and sub-arrays of transistors (41-43). The bonding pads (45-47) are distributed between the sub-arrays of transistors (41-43) to reduce the maximum temperature that any portion of the FET (30) is exposed to while the FET (30) is in a conducting state. A similar effect can be appreciated by adjusting the threshold voltage or pinch-off resistance of the transistors in a portion (101) of an array of transistors (95).
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: July 23, 2002
    Assignee: Motorola, Inc.
    Inventors: Phillipe Dupuy, Steven L. Merchant, Robert W. Baird
  • Field effect transistor and method of making
    Publication number: 20020036329
    Abstract: A field effect transistor (30) has an array of transistors (31) made up of bonding pads (45-47) and sub-arrays of transistors (41-43). The bonding pads (45-47) are distributed between the sub-arrays of transistors (41-43) to reduce the maximum temperature that any portion of the FET (30) is exposed to while the FET (30) is in a conducting state. A similar effect can be appreciated by adjusting the threshold voltage or pinch-off resistance of the transistors in a portion (101) of an array of transistors (95).
    Type: Application
    Filed: November 2, 2001
    Publication date: March 28, 2002
    Inventors: Phillipe Dupuy, Steven L. Merchant, Robert W. Baird
  • Method of changing the power dissipation across an array of transistors
    Patent number: 6140184
    Abstract: A field effect transistor (30) has an array of transistors (31) made up of bonding pads (45-47) and sub-arrays of transistors (41-43). The bonding pads (45-47) are distributed between the sub-arrays of transistors (41-43) to reduce the maximum temperature that any portion of the FET (30) is exposed to while the FET (30) is in a conducting state. A similar effect can be appreciated by adjusting the threshold voltage or pinch-off resistance of the transistors in a portion (101) of an array of transistors (95).
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: October 31, 2000
    Assignee: Motorola, Inc.
    Inventors: Phillipe Dupuy, Steven L. Merchant, Robert W. Baird