Patents by Inventor Phillipe Gendrier

Phillipe Gendrier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6940119
    Abstract: The semiconducting memory device comprises a non-volatile programmable and electrically erasable memory cell with a single layer of grid material and comprising a floating grid transistor and a control grid, within an active semiconducting area formed in a region of the substrate and delimited by an isolation region. The layer of grid material EG, FL P2 in which the floating grid FG is made extends integrall above the active area ZA without overlapping part of the isolation region STI, and the transistor is electrically isolated from the control grid CG by PN junctions that will be reverse biased.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: September 6, 2005
    Assignee: STMicroelectronics SA
    Inventors: Cyrille Dray, Phillipe Gendrier, Richard Fournel
  • Publication number: 20040062108
    Abstract: The semiconductor memory device includes a non-volatile programmable and electrically erasable memory cell with a single layer of gate material and a floating gate transistor and a control gate, within an active semiconducting area formed in a region of the substrate and delimited by an isolation region. The layer of gate material in which the floating gate is made extends integrally above the active area without overlapping part of the isolation region, and the transistor is electrically isolated from the control gate by PN junctions that will be inverse polarized.
    Type: Application
    Filed: March 6, 2003
    Publication date: April 1, 2004
    Applicant: STMicroelectronics SA
    Inventors: Cyrille Dray, Phillipe Gendrier, Richard Fournel