Patents by Inventor Philomena Cleopha Brady

Philomena Cleopha Brady has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11201547
    Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: December 14, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Philomena Cleopha Brady, Ananthakrishnan Viswanathan, Shanguang Xu
  • Patent number: 10756620
    Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: August 25, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Ananthakrishnan Viswanathan, Salvatore Giombanco, Joseph Michael Leisten, Philomena Cleopha Brady
  • Publication number: 20190356219
    Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.
    Type: Application
    Filed: July 30, 2019
    Publication date: November 21, 2019
    Inventors: Ananthakrishnan Viswanathan, Salvatore Giombanco, Joseph Michael Leisten, Philomena Cleopha Brady
  • Patent number: 10411592
    Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: September 10, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Ananthakrishnan Viswanathan, Salvatore Giombanco, Joseph Michael Leisten, Philomena Cleopha Brady
  • Publication number: 20190267903
    Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
    Type: Application
    Filed: May 9, 2019
    Publication date: August 29, 2019
    Inventors: Philomena Cleopha Brady, Ananthakrishnan Viswanathan, Shanguang Xu
  • Publication number: 20190207521
    Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
    Type: Application
    Filed: January 18, 2018
    Publication date: July 4, 2019
    Inventors: PHILOMENA CLEOPHA BRADY, ANANTHAKRISHNAN VISWANATHAN, SHANGUANG XU
  • Publication number: 20190199203
    Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.
    Type: Application
    Filed: December 26, 2017
    Publication date: June 27, 2019
    Inventors: Ananthakrishnan VISWANATHAN, Salvatore GIOMBANCO, Joseph Michael LEISTEN, Philomena Cleopha BRADY
  • Patent number: 10326373
    Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: June 18, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Philomena Cleopha Brady, Ananthakrishnan Viswanathan, Shanguang Xu
  • Patent number: 10284077
    Abstract: A Power Factor Correction (PFC) controller includes an error amplifier for amplifying a difference between Vout and intended Vout to provide a power demand (Pdem) output at a compensation pin. A burst mode controller includes soft-start circuitry coupled to receive Pdem and to a drive pin which provides pulses to a control node of a power switch of a DC-DC converter during burst periods. The pulses slow ramping of line current over a first 2 to 36 switching cycles at a beginning of bursts when energizing the inductor to reduce a line current slope as compared to without ramping up, and for slowing ramping down of line current over the last 2 to 36 switching cycles to reduce a line current slope when de-energizing the inductor as compared to a line current without ramping down. The PFC controller does not utilize zero-crossings of the line voltage for burst period synchronization.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: May 7, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joseph Michael Leisten, Ananthakrishnan Viswanathan, Philomena Cleopha Brady, Brent Alan McDonald
  • Publication number: 20190115826
    Abstract: A Power Factor Correction (PFC) controller includes an error amplifier for amplifying a difference between Vout and intended Vout to provide a power demand (Pdem) output at a compensation pin. A burst mode controller includes soft-start circuitry coupled to receive Pdem and to a drive pin which provides pulses to a control node of a power switch of a DC-DC converter during burst periods. The pulses slow ramping of line current over a first 2 to 36 switching cycles at a beginning of bursts when energizing the inductor to reduce a line current slope as compared to without ramping up, and for slowing ramping down of line current over the last 2 to 36 switching cycles to reduce a line current slope when de-energizing the inductor as compared to a line current without ramping down. The PFC controller does not utilize zero-crossings of the line voltage for burst period synchronization.
    Type: Application
    Filed: October 17, 2017
    Publication date: April 18, 2019
    Inventors: JOSEPH MICHAEL LEISTEN, ANANTHAKRISHNAN VISWANATHAN, PHILOMENA CLEOPHA BRADY, BRENT ALAN MCDONALD
  • Patent number: 10128744
    Abstract: Disclosed examples include methods and control circuits to operate a single or multi-phase DC-DC converter, including an output that turns a first switch on for a controlled on time and then turns the switch off for a controlled off time in successive control cycles, as well as a PWM circuit that computes a threshold time value corresponding to a predetermined peak inductor current and a duty cycle value, and computes a first time value according to an error value for a subsequent second switching control cycle. The PWM circuit sets the on time to the first time value to operate in a critical conduction mode for the second switching control cycle when the first time value is greater than or equal to the threshold time value, and otherwise sets the controlled on time to the threshold time value for discontinuous conduction mode operation in the second control cycle.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: November 13, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ananthakrishnan Viswanathan, Joseph Michael Leisten, Brent McDonald, Philomena Cleopha Brady
  • Publication number: 20180069471
    Abstract: A power factor correction (PFC) pre-converter includes a boost converter and a PFC controller. The boost converter is configured to step up a boost converter input voltage by generating a boost converter output voltage. The boost converter includes an inductor, a switch, and a diode. The PFC controller is configured to control the switch by generating a signal causing the switch to be closed for a first period of time. The first period of time ends when current through the inductor reaches a target current value. The PFC controller is also configured to control the switch by, in response to the first period of time ending, generating a signal causing the switch to be open for a second period of time. The second period of time is based on a ratio between the first period of time and a critical conduction mode on time.
    Type: Application
    Filed: September 6, 2016
    Publication date: March 8, 2018
    Inventors: Joseph Michael LEISTEN, Ananthakrishnan VISWANATHAN, Brent McDONALD, Philomena Cleopha BRADY
  • Patent number: 9342124
    Abstract: A power delivery and control device that includes a voltage input line, a voltage output line, a control logic unit coupled to the voltage input and voltage output line to control a voltage being delivered by the voltage output line based on a programmable behavior parameter, a voltage output register accessible to the control logic unit to define the programmable behavior parameter, a control register accessible to the control logic unit to activate and deactivate the voltage output line, and a control line coupled to the control logic unit to receive commands to change content of the voltage output register.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: May 17, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: David Thomas Bailey, Philomena Cleopha Brady, Nakshatra Shankar Gajbhiye, Eric Warren Southard
  • Publication number: 20140354079
    Abstract: A power delivery and control device that includes a voltage input line, a voltage output line, a control logic unit coupled to the voltage input and voltage output line to control a voltage being delivered by the voltage output line based on a programmable behavior parameter, a voltage output register accessible to the control logic unit to define the programmable behavior parameter, a control register accessible to the control logic unit to activate and deactivate the voltage output line, and a control line coupled to the control logic unit to receive commands to change content of the voltage output register.
    Type: Application
    Filed: August 13, 2013
    Publication date: December 4, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: David Thomas Bailey, Philomena Cleopha Brady, Nakshatra Shankar Gajbhiye, Eric Warren Southard
  • Patent number: 7482844
    Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: January 27, 2009
    Assignee: Georgia Tech Research Corporation
    Inventors: Philomena Cleopha Brady, Paul Edward Hasler
  • Patent number: 7034603
    Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: April 25, 2006
    Assignee: Georgia Tech Research Corporation
    Inventors: Philomena Cleopha Brady, Haw-Jing Lo, Guillermo José Serrano, Farhan Adil, Matthew Raymond Kucic, Paul Edward Hasler, David V. Anderson, Angelo W. Pereira
  • Publication number: 20040240278
    Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.
    Type: Application
    Filed: May 27, 2003
    Publication date: December 2, 2004
    Inventors: Philomena Cleopha Brady, Haw-Jing Lo, Guillermo Jose Serrano, Farhan Adil, Matthew Raymond Kucic, Paul Edward Hasler, David V. Anderson, Angelo W. Pereira