Patents by Inventor Phuc M. Nyugen

Phuc M. Nyugen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package with embedded capacitor and methods of manufacturing same
    Patent number: 9548266
    Abstract: A semiconductor package with an embedded capacitor and corresponding manufacturing methods are described. The semiconductor package with the embedded capacitor includes a semiconductor die having a first metal layer extending across at least a portion of a first side of the semiconductor die and a package structure formed on the first side of the semiconductor die. A first electrical conductor of the embedded capacitor is formed in the first metal layer of the semiconductor die. The package structure includes a second metal layer that has formed therein a second electrical conductor of the embedded capacitor. A dielectric of the embedded capacitor is positioned within either the semiconductor die or the package structure of the semiconductor package to isolate the first electrical conductor from the second electrical conductor of the embedded capacitor.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: January 17, 2017
    Assignee: NXP USA, INC.
    Inventors: Sergio A. Ajuria, Phuc M. Nyugen, Douglas M. Reber
  • SEMICONDUCTOR PACKAGE WITH EMBEDDED CAPACITOR AND METHODS OF MANUFACTURING SAME
    Publication number: 20160064324
    Abstract: A semiconductor package with an embedded capacitor and corresponding manufacturing methods are described. The semiconductor package with the embedded capacitor includes a semiconductor die having a first metal layer extending across at least a portion of a first side of the semiconductor die and a package structure formed on the first side of the semiconductor die. A first electrical conductor of the embedded capacitor is formed in the first metal layer of the semiconductor die. The package structure includes a second metal layer that has formed therein a second electrical conductor of the embedded capacitor. A dielectric of the embedded capacitor is positioned within either the semiconductor die or the package structure of the semiconductor package to isolate the first electrical conductor from the second electrical conductor of the embedded capacitor.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 3, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Sergio A. Ajuria, Phuc M. Nyugen, Douglas M. Reber