Abstract: A non-volatile static random access memory (NVSRAM) cell including a static random access circuit, first storage device, a second storage device, and a switch unit is provided. The static random access circuit has a first terminal and a second terminal respectively having a first voltage and a second voltage. Stored data in the first storage device and the second storage device are determined by the first voltage and the second voltage. The first storage device and the second storage device respectively have a first connection terminal and a second connection terminal. The switch unit is respectively coupled to the second connection terminals of the first storage device and the second storage device, and is controlled by a switching signal of a switch line to conduct the first storage device and the second storage device to a same bit line or a same complementary bit line.

Abstract: A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.

Abstract: A reference current generator for a resistance type memory and a method thereof is disclosed. The reference current generator comprises N parallel circuit sets. Each of the N parallel circuit sets is formed with at least one first reference element and second reference elements connected in parallel. The number of the first reference elements plus the number of the second reference elements is N. The resistance value of first reference elements (a first resistance value) is not equal to the resistance value of the second reference elements (a second resistance value). An equivalent resistance provided with a equivalent resistance value between the first and second resistance value is formed by connecting the N parallel circuit sets in series between an input terminal and output terminal. A reference current is outputted from the output terminal by applying an operation voltage to the input terminal.

Abstract: A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.

Abstract: A reference current generator for a resistance type memory and a method thereof is disclosed. The reference current generator comprises N parallel circuit sets. Each of the N parallel circuit sets is formed with at least one first reference element and second reference elements connected in parallel. The number of the first reference elements plus the number of the second reference elements is N. The resistance value of first reference elements (a first resistance value) is not equal to the resistance value of the second reference elements (a second resistance value). An equivalent resistance provided with a equivalent resistance value between the first and second resistance value is formed by connecting the N parallel circuit sets in series between an input terminal and output terminal. A reference current is outputted from the output terminal by applying an operation voltage to the input terminal.