Abstract: The integrated circuit (IC) structure includes a semiconductor substrate, a first active region, a dummy fill region, a second active region, first metal gate structures, and second metal gate structures. The first active region is on the semiconductor substrate. The dummy fill region is on the semiconductor substrate. The second active region is on the semiconductor substrate and spaced apart from the first active region by the dummy fill region. The first metal gate structures extend in the first active region and have a first gate pitch and a first gate width. The second metal gate structures extend in the second active region and have a second gate width greater than the first gate width and a second gate pitch being an integer times the first gate pitch, and the integer being two or more.

Abstract: A method that includes receiving an integrated circuit (IC) design layout including a layout block, where the layout block has a corner, adding first patterns along a first edge of the corner, adding second patterns along a second edge of the corner, moving a first column of the first patterns closest to the second edge horizontally toward the second edge, moving a second column of second patterns closest to the second edge horizontally toward the second edge, extending lengths of the first and second patterns in the first and second columns, and outputting a pattern layout in a computer-readable format, where the pattern layout includes the first patterns and the second patterns.