Patents by Inventor Piccolo G. Gianella

Piccolo G. Gianella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5023194
    Abstract: A vertical semiconductor device having a plurality of vertical active regions and a method for manufacturing such a vertical semiconductor device. In the preferred embodiment, a vertical multicollector pnp transistor is formed by disposing a plurality of n type epitaxial layers over a bottom p type substrate. Each epitaxial layer has a plurality of collector regions formed therein. The collector regions are connected using a single diffusion step to form vertical collectors for the pnp transistor. The base is formed from the epitaxial layers and the emitter is formed using a separate implant or diffusion step. Vertical isolation regions are formed contemporaneously with the vertical collectors. The resulting pnp transistor has vertical collectors and isolation regions formed with less silicon, fewer diffusion steps, and more precise and reduced dimensions.
    Type: Grant
    Filed: February 11, 1988
    Date of Patent: June 11, 1991
    Assignee: Exar Corporation
    Inventor: Piccolo G. Gianella