Patents by Inventor Pier Paolo Stoppino
Pier Paolo Stoppino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150039463Abstract: The invention disclose a system for managing service requests, comprising: at least a database (1) for storing data of service requestors (2) and service executors (3); a web interface (4) for the service requestors (2), for manually entering service requests (5) in the database (1), each service request (5) including at least a unique identifier, a date and a place of service request and payment information for the service execution; a web interface (6) for the service executors (3), for searching service requests (5) in the database (1) and for selecting one or more service requests (5) to be executed, wherein the interface (4) of the service requestors (2) includes means for identifying the executors (3) who have selected the service requests (5), means for accepting the service execution from a service executor (3) and means for closing the service requests (5) after execution, said means for closing the service request comprising a payment to the service executor (3) for the executed service.Type: ApplicationFiled: August 2, 2013Publication date: February 5, 2015Inventor: Pier Paolo Stoppino
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Patent number: 8928123Abstract: A substrate has a first surface and a second surface opposed to each other. A blind hole is formed in the substrate extending from the first surface at a location for each through via. Each blind hole is filled with a conductive filler; a deepest part of each filler forming a bump portion made of a solder material. Part of the substrate extending from the second surface is removed to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding solder bump.Type: GrantFiled: May 30, 2014Date of Patent: January 6, 2015Assignees: STMicroelectronics S.r.l., Politecnico di MilanoInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
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Publication number: 20140264852Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.Type: ApplicationFiled: May 30, 2014Publication date: September 18, 2014Applicants: STMicroelectronics S.r.l., POLITECNICO DI MILANOInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
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Patent number: 8759215Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.Type: GrantFiled: August 6, 2009Date of Patent: June 24, 2014Assignees: STMicroelectronics S.r.l., Politecnico di MilanoInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
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Patent number: 7804322Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.Type: GrantFiled: October 30, 2008Date of Patent: September 28, 2010Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
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Patent number: 7750690Abstract: An output stage may include an input terminal receiving an input signal, an output terminal coupled to an external load, and a pre-buffer coupled to the input terminal and including an enable terminal receiving a general enable signal and a first output terminal for supplying a first control signal. The output stage may also include an output buffer including a first final transistor inserted between the supply terminal and the output terminal, and a control terminal coupled to the first output terminal of the pre-buffer for receiving the first control signal, and a first tracking circuit between the supply terminal and the first output terminal of the pre-buffer. The first tracking circuit may include a first capacitor between the supply terminal and a first intermediate node coupled to the first output terminal of the pre-buffer by a switch activated by a first activation signal during a transient of the first final transistor thereby reconstructing a noise of the first reference voltage.Type: GrantFiled: January 10, 2008Date of Patent: July 6, 2010Assignees: STMicroelectronics S.R.L., Politecnico di MilanoInventors: Paolo Pulici, Michele Bartolini, Pier Paolo Stoppino
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Patent number: 7616515Abstract: An integrated electronic device includes at least one supply pin and at least one booster coupled to said at least one supply pin. Moreover, there is at least one integrated circuit powered by the at least one booster and associated therewith in a “system in a package configuration.Type: GrantFiled: April 11, 2006Date of Patent: November 10, 2009Inventors: Giovanni Campardo, Gian Pietro Vanalli, Pier Paolo Stoppino, Roberto Dossi, Aldo Losavio
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Publication number: 20090167370Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.Type: ApplicationFiled: October 30, 2008Publication date: July 2, 2009Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
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Patent number: 7463051Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.Type: GrantFiled: December 13, 2006Date of Patent: December 9, 2008Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
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Publication number: 20080174363Abstract: An output stage may include an input terminal receiving an input signal, an output terminal coupled to an external load, and a pre-buffer coupled to the input terminal and including an enable terminal receiving a general enable signal and a first output terminal for supplying a first control signal. The output stage may also include an output buffer including a first final transistor inserted between the supply terminal and the output terminal, and a control terminal coupled to the first output terminal of the pre-buffer for receiving the first control signal, and a first tracking circuit between the supply terminal and the first output terminal of the pre-buffer. The first tracking circuit may include a first capacitor between the supply terminal and a first intermediate node coupled to the first output terminal of the pre-buffer by a switch activated by a first activation signal during a transient of the first final transistor thereby reconstructing a noise of the first reference voltage.Type: ApplicationFiled: January 10, 2008Publication date: July 24, 2008Applicants: STMicroelectronics S.r.l., Politecnico di MilanoInventors: Paolo PULICI, Michele Bartolini, Pier Paolo Stoppino