Abstract: A system having reduced quiescent current drawn from a power supply. The system includes a device having a status. Moreover, the system includes a microcontroller, having an active and a sleep mode of operation, for polling the status of the device during the active mode, initiating a function in response to a change in the status during the active mode, and for conserving quiescent current drawn from the power supply during the sleep mode. The microcontroller generates an output signal at a first voltage level during the active mode and generates the output signal at a second voltage level during the sleep mode. The microcontroller, additionally, includes a sensor for switching the microcontroller from the sleep mode to the active mode. Furthermore system includes a storage device for charging to the first voltage level during the active mode, and for discharging to a third voltage level during the sleep mode for triggering the sensor to switch from the sleep mode to the active mode.