Patents by Inventor Pierangelo Garino

Pierangelo Garino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040243742
    Abstract: The present invention is related to a method of transferring data in an electronic circuit (10) incorporating a control unit or CPU (21), first circuit blocks (41) and second circuit blocks (61) interconnected by means of a BUS (24). The method and the relating circuit envisage the use of interface devices (45a) and/or (45b), associated to respective circuit blocks, and capable of managing the direct transfer of data from the first block (41) to the second block (61), or vice-versa, without the control by the CPU (21) during such a transfer. For the purpose of this method, and relating circuit (101), interface device (45a) must be, able to intercept control commands issued by CPU (21) and to directly manage the data transfer from the first block (41) to the second block (61) .Thus, the method and the circuit (101), and the interface device (45a) make it possible to considerably reduce the load of CPU 21, BUS 24 and electronic circuit (101) as well.
    Type: Application
    Filed: March 18, 2004
    Publication date: December 2, 2004
    Inventors: Andrea Bragagnini, Pierangelo Garino, Maura Turolla, Antonio Varriale
  • Publication number: 20040243383
    Abstract: The present invention relates to a system (10) and method for making electronic circuits comprising elements or elementary circuit blocks which can be implemented either in the form of physical circuits, for instance FPGA, or in the form of firmware, for instance memorised on microprocessor. Thanks to the methodology used to describe the circuit blocks (26a, 26b) and their functional models (21), the system (10) and method allow to execute with a WS (11) and an emulator subsystem (30), in a single integrated environment, both the functional simulation of the model of complex electronic circuit and the emulation of the electronic circuit itself. Moreover, thanks to the characteristics of intrinsic congruence between the circuit blocks (26a, 26b) and their models (21), the emulation of the complex electronic circuit can be effected using alternatively circuit blocks implemented on the emulator subsystem either in the form of hardware (26a) or in the form of firmware (26b).
    Type: Application
    Filed: March 11, 2004
    Publication date: December 2, 2004
    Inventors: Pierangelo Garino, Fabio Ricciato, Alfredo Ruscitto, Maura Turolla, Antonio Varriale
  • Patent number: 6122320
    Abstract: The circuit for motion estimation in digitised video sequence encoders comprises at least an integrated circuit component (IM, IM1 . . . IMn) which is arranged to perform either the function of determining motion vectors and associated costs for different prediction modes, or the function of vector refinement, possibly in addition to prediction mode selection. The circuit (IM) is based on the use of two operating units (M1, M2) which are arranged to concurrently process in different ways different pixel groups according to a MIMD technique. Preferably, when the circuit performs motion vector determination, the operating units (M1, M2) are programmed to execute a genetic algorithm exploiting an initial vector population taking into account the temporal and spatial correlations in the picture.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: September 19, 2000
    Assignee: CSELT-Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventors: Fabio Bellifemine, Gianmario Bollano, Andrea Finotello, Marco Gandini, Pierangelo Garino, Mauro Marchisio, Alessandro Torielli, Didier Nicoulaz, Stephanie Dogimont, Martin Gumm, Marco Mattavelli, Frederich Mombers
  • Patent number: 5903310
    Abstract: An integrated circuit for manipulating digitized video sequences is provided, for use in a system for transmission and reception of compressed video sequences to perform, possibly with the aid of an external memory, reordering, format conversion, prediction and motion compensation on the pictures in a sequence. The device has memory for temporarily storing sequences to be manipulated and data read from the external memory; a circuit for decoding information about the manipulations to be performed; address circuitry for transferring the data between the device and the external memory; circuitry for configuring the device by means of a remote processing unit; circuitry for processing the data read from the external memory; and circuitry for arranging the output sequences in the format required by the function to be performed. A controller may control, supervise and set up the functions to be performed.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: May 11, 1999
    Assignee: CSELT-Centro Studi E Laboratori Telecomunicazioni S.p.A.
    Inventors: Andrea Finotello, Marco Gandini, Pierangelo Garino, Mauro Marchisio
  • Patent number: 5684804
    Abstract: A device for transmitting and decoding audio-visual streams arranged in accordance with standard ISO/IEC 11172 is provided. The device (DEC) comprises: interfaces (CSC, IA, CIS) for connection to a local storage device (MEL) or to a telecommunications network (2, 3), for receiving streams from remote sources or send streams to remote receivers; demultiplexing and synchronisation means (DES) for splitting the audio-visual streams into constituent audio, video and private data streams and extracting synchronisation information from the streams, and means (DA, DV, UA, UV) for decoding audio and video streams and present audio and video signals in analog form at the output. A controller (CNT) is to control and supervise demultiplexing and decoding operations.
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: November 4, 1997
    Assignee: SIP-Societa Italiana per l'Esercizio delle Telecomunicazioni p.a.
    Inventors: Giovanni Baronetti, Stefano Dal Lago, Marco Gandini, Pierangelo Garino, Giovanni Ghigo
  • Patent number: 5319447
    Abstract: The video control circuit is particularly adapted to multimedia applicati, wherein image transmission services are offered in addition to usual telephone speech and data transmission services. The circuit is capable of processing both photographic and graphic video images, satisfying both the relevant CCIR standards and the specifications proper to personal computers, VGA EGA, etc. so as to allow the representation of either types of images on an only type of display. To this end, it generates both timings proper to the CCIR standards, for a resolution of 720 columns per 480 lines, with an upper representation limit of graphic planes of 1024 columns per 1024 lines.
    Type: Grant
    Filed: February 11, 1993
    Date of Patent: June 7, 1994
    Assignee: SIP-Societa Italiana per l'Esercizio delle Telecommunicazioni P.A.
    Inventors: Pierangelo Garino, Giovanni Ghigo, Mauro Marchisio, Giovanni Pucci, Alfredo Rinaudo