Patents by Inventor Pierluigi Nuzzo

Pierluigi Nuzzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7773010
    Abstract: The present invention is related to an analogue-to-digital (A/D) converter comprising at least two voltage comparator devices. Each of the voltage comparator devices is arranged for being fed with a same input signal and for generating an own internal voltage reference. The two internal voltage references are different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of said input signal.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: August 10, 2010
    Assignee: IMEC
    Inventors: Geert Van der Plas, Pierluigi Nuzzo, Fernando De Bernardinis
  • Publication number: 20090195424
    Abstract: The present invention is related to an analogue-to-digital (A/D) converter comprising at least two voltage comparator devices. Each of the voltage comparator devices is arranged for being fed with a same input signal and for generating an own internal voltage reference. The two internal voltage references are different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of said input signal.
    Type: Application
    Filed: January 31, 2007
    Publication date: August 6, 2009
    Applicants: Interuniversitair Microelektronica Centrum (IMEC), Universita di Pisa
    Inventors: Geert Van Der Plas, Pierluigi Nuzzo, Fernando De Bernardinis
  • Publication number: 20090066555
    Abstract: The present invention discloses an analogue-to-digital converter comprising at least two voltage comparator devices. Each of the voltage comparator devices comprises a differential structure of transistors and is arranged for being fed with a same input signal and for generating an own internal voltage reference by means of an imbalance in the differential structure, said two internal voltage references being different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of the input signal.
    Type: Application
    Filed: August 13, 2008
    Publication date: March 12, 2009
    Applicant: Interuniversitair Microelektronica Centrum(IMEC)
    Inventors: Geert Van Der Plas, Pierluigi Nuzzo, Fernando De Bernardinis