Patents by Inventor Pierre Brouquet

Pierre Brouquet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for electrical insulation in microelectronics, applicable in narrow cavities, by deposition of oxide in the viscous state and corresponding device
    Patent number: 5786039
    Abstract: The invention relates to a process for electrical insulation of conductive or semiconductor materials of a substrate, characterized in that it comprises at least the following steps:(a) at least one so-called conformal layer of insulating oxide is deposited on the predetermined regions of the substrate to be insulated;(b) a layer of planarizing oxide precursor is deposited on the predetermined regions by chemical reaction in plasma phase of a tetraalkylsilicate and of hydrogen peroxide;(c) at least one layer of insulating oxide is deposited on the predetermined regions; and(d) a conversion annealing operation is carried out.It also relates to the semiconductor devices and integrated-circuit elements having insulated narrow cavities.
    Type: Grant
    Filed: May 14, 1996
    Date of Patent: July 28, 1998
    Assignee: France Telecom
    Inventor: Pierre Brouquet
  • Method of isolating active areas of a semiconductor substrate by shallow trenches and narrow trenches
    Patent number: 5641704
    Abstract: The semiconductor device includes in a semiconductor substrate (1) at least one predetermined region (6) of the substrate intended subsequently to form an active area, uncovered on its upper surface and situated between lateral trenches (7) containing an insulative material including a layer (9) of a planarising first oxide and at least one underlying layer (8) of a conformal second oxide. The insulative material can form on either side of said uncovered predetermined region (6) of the substrate a boss (16) on the plane upper surface of the device (D) less than 1000 .ANG. high.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: June 24, 1997
    Assignee: France Telecom
    Inventors: Maryse Paoli, Pierre Brouquet, Michel Haond
  • Method of and device for isolating active areas of a semiconducor substrate by quasi-plane shallow trenches
    Patent number: 5604149
    Abstract: The semiconductor device comprises in a semiconductor substrate (1) at least one predetermined region (6) of the substrate intended subsequently to form an active area, uncovered on its upper surface and situated between the lateral trenches (7) containing an insulative material including at least one layer of a conformal oxide, the insulative material forming on either side of said uncovered predetermined region of the substrate a boss (16) on the plane upper surface of the device. The height of the boss is less than 1 000 .ANG. and the insulative material can also include planarising oxide.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: February 18, 1997
    Assignee: France Telecom
    Inventors: Maryse Paoli, Pierre Brouquet, Michel Haond