Patents by Inventor Pierre Calippe

Pierre Calippe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiple processor cellular radio
    Patent number: 7197623
    Abstract: Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The Protocol Processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: March 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Gerard Chauvel, Francis Aussedat, Pierre Calippe
  • Protocol processor intended for the execution of a collection of instructions in a reduced number of operations
    Patent number: 7028145
    Abstract: Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The protocol processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: April 11, 2006
    Inventors: Gerard Chauvel, Francis Aussedat, Pierre Calippe
  • Protocol processor for the execution of a collection of instructions in a reduced number of operations
    Patent number: 6085308
    Abstract: Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The protocol processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: July 4, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Gerard Chauvel, Francis Aussedat, Pierre Calippe
  • Multiple processor apparatus having a protocol processor intended for the execution of a collection of instructions in a reduced number of operations
    Patent number: 6000026
    Abstract: Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The protocol processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: December 7, 1999
    Assignee: Texas Instrument Incorporated
    Inventors: Gerard Chauvel, Francis Aussedat, Pierre Calippe
  • Protocol processor intended for the execution of a collection of instructions in a reduced number of operations
    Patent number: 5740458
    Abstract: Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The protocol processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: April 14, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Gerard Chauvel, Francis Aussedat, Pierre Calippe