Abstract: A system for the detection of programmable stop codes in a data exchange performed between the local memory of a microprocessor and the peripheral unit in a microprocessor assembly using direct access circuit to the local memory. This circuit divides the access to a common bus permitting data exchanges between a peripheral unit and the local memory. The system comprises a random access memory receiving the data on addressing inputs and receiving an address bit on a data input, a control circuit having outputs which are respectively connected to validation and writing control inputs of the random access memory. The control circuit repectively receives on inputs, signals coming from the microprocessor or the direct access circuit and which respectively relate to the writing or reading input-output operations as well as to the address decoding of the data.