Patents by Inventor Pierre Dermy
Pierre Dermy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240120922Abstract: Integrated circuits described herein implement multiplexer (MUX) gate system. An integrated circuit includes a plurality of inputs coupled with a first stage of the integrated circuit. The first stage includes a plurality of first Schottky diodes and a plurality of N-type transistors. Each input is coupled with a respective first Schottky diode and N-type transistor. The integrated circuit also includes a plurality of outputs of the first stage coupled with a second stage of the integrated circuit. The second stage includes a plurality of second Schottky diodes and a plurality of P-type transistors. Each output is coupled with a respective second Schottky diode and P-type transistor. The integrated circuit further includes a plurality of outputs of the second stage coupled with a set of transistors including a P-type transistor and an N-type transistor, and an output of the set of transistors coupled with an output of the MUX gate system.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Patent number: 11870438Abstract: Integrated circuits described herein implement multiplexer (MUX) gate system. An integrated circuit includes a plurality of inputs coupled with a first stage of the integrated circuit. The first stage includes a plurality of first Schottky diodes and a plurality of N-type transistors. Each input is coupled with a respective first Schottky diode and N-type transistor. The integrated circuit also includes a plurality of outputs of the first stage coupled with a second stage of the integrated circuit. The second stage includes a plurality of second Schottky diodes and a plurality of P-type transistors. Each output coupled with a respective second Schottky diode and P-type transistor. The integrated circuit further includes a plurality of outputs of the second stage coupled with a set of transistors including a P-type transistor and an N-type transistor, and an output of the set of transistors coupled with an output of the MUX gate system.Type: GrantFiled: May 24, 2022Date of Patent: January 9, 2024Assignee: SCHOTTKY LSI, INC.Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Publication number: 20230080635Abstract: This application is directed to integrating a field-effect transistor (FinFET) and a Schottky barrier diode on a substrate. A first fin structure and a second fin structure are formed on the substrate. The first fin structure includes a channel portion extending to two stressor portions on two opposite sides of the channel portion, and the second fin structure includes a junction portion. A source structure and a drain structure of the FinFET are formed on the two stressor portions of the first fin structure, respectively. A source metallic material, a drain metallic material, a first metallic material are formed to electrically couple to the source structure, the drain structure, and the junction portion of the second fin structure, respectively, thereby providing a Schottky junction between the junction portion of the second fin structure and the first metallic material.Type: ApplicationFiled: September 22, 2022Publication date: March 16, 2023Inventor: Pierre Dermy
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Publication number: 20220286134Abstract: Integrated circuits described herein implement multiplexer (MUX) gate system. An integrated circuit includes a plurality of inputs coupled with a first stage of the integrated circuit. The first stage includes a plurality of first Schottky diodes and a plurality of N-type transistors. Each input is coupled with a respective first Schottky diode and N-type transistor. The integrated circuit also includes a plurality of outputs of the first stage coupled with a second stage of the integrated circuit. The second stage includes a plurality of second Schottky diodes and a plurality of P-type transistors. Each output coupled with a respective second Schottky diode and P-type transistor. The integrated circuit further includes a plurality of outputs of the second stage coupled with a set of transistors including a P-type transistor and an N-type transistor, and an output of the set of transistors coupled with an output of the MUX gate system.Type: ApplicationFiled: May 24, 2022Publication date: September 8, 2022Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Patent number: 11342916Abstract: Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.Type: GrantFiled: May 26, 2020Date of Patent: May 24, 2022Assignee: SCHOTTKY LSI, INC.Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Publication number: 20200287546Abstract: Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Patent number: 10666260Abstract: Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.Type: GrantFiled: November 17, 2017Date of Patent: May 26, 2020Assignee: SCHOTTKY LSI, INC.Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Publication number: 20180212605Abstract: Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.Type: ApplicationFiled: November 17, 2017Publication date: July 26, 2018Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Patent number: 9853643Abstract: Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.Type: GrantFiled: April 10, 2017Date of Patent: December 26, 2017Assignee: SCHOTTKY LSI, INC.Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Publication number: 20170287891Abstract: Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.Type: ApplicationFiled: April 10, 2017Publication date: October 5, 2017Inventors: Augustine Wei-Chun Chang, Pierre Dermy
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Patent number: 7187530Abstract: An electrostatic discharge protective circuit may comprise a low-pass filter and a high-pass filter to receive and filter signals of a supply line. Control logic may receive output signals of the low-pass and high-pass filters and may operate a gateable channel to shunt current of the supply line dependent on the output signals from the filters.Type: GrantFiled: February 4, 2003Date of Patent: March 6, 2007Assignee: T-Ram Semiconductor, Inc.Inventors: Craig Thomas Salling, Siak Chon Kee, Pierre Dermy
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Publication number: 20040125521Abstract: An electrostatic discharge protective circuit may comprise a low-pass filter and a high-pass filter to receive and filter signals of a supply line. Control logic may receive output signals of the low-pass and high-pass filters and may operate a gateable channel to shunt current of the supply line dependent on the output signals from the filters.Type: ApplicationFiled: February 4, 2003Publication date: July 1, 2004Inventors: Craig Thomas Salling, Siak Chon Kee, Pierre Dermy