Abstract: A novel built-in notched channel MOS-FET device with an effective channel length smaller than the effective channel length of conventional built-in channel MOS-FET devices. The device comprises an insulating substrate, a semiconductor layer with two n.sup.+ -type regions separated by an n-type region, insulation over the semiconductor region, with an opening in each n.sup.+ -type semiconductor region for metal contacts, a notch in the n-type semiconductor region, at least half of the notch being in the n-type region and touching the boundary between one n.sup.+ -type semiconductor region and the n-type semiconductor region, and a metal contact above the notch, all of the metal contacts functioning as electrodes.