Patents by Inventor Pierre-Emmanuel Julien Gaillardon

Pierre-Emmanuel Julien Gaillardon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Majority logic synthesis
    Patent number: 10394988
    Abstract: A method for optimizing an implementation of a logic circuit, comprising steps of providing an interpretation of the logic circuit in terms of 3 Boolean variable majority operators M, with each of the majority operators being a function of a plurality of variables that returns a logic value assumed by more than half of the plurality of variables, and a single Boolean variable complementation operator ?. The method further comprises providing a commutativity, a majority (?.M), an associativity (?.A), a distributivity (?.D), an inverter propagation (?.I), a relevance (?.R), a complementary associativity (?.C), and a substitution (?.S) transformation; and combining the ?.M, ?.C, ?.A, ?.D, ?.I, ?.R, ?.C and ?.S transformations to reduce an area of the logic circuit via (i) a reshaping procedure consisting of the ?.A, ?.C, ?.D, ?.I, ?.R, ?.S and ?.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: August 27, 2019
    Assignee: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
    Inventors: Pierre-Emmanuel Julien Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
  • Majority Logic Synthesis
    Publication number: 20170177750
    Abstract: A method for optimizing an implementation of a logic circuit, comprising steps of providing an interpretation of the logic circuit in terms of 3 Boolean variable majority operators M, with each of the majority operators being a function of a plurality of variables that returns a logic value assumed by more than half of the plurality of variables, and a single Boolean variable complementation operator ?. The method further comprises providing a commutativity, a majority (?.M), an associativity (?.A), a distributivity (?.D), an inverter propagation (?.I), a relevance (?.R), a complementary associativity (?.C), and a substitution (?.S) transformation; and combining the ?.M, ?.C, ?.A, ?.D, ?.I, ?.R, ?.C and ?.S transformations to reduce an area of the logic circuit via (i) a reshaping procedure consisting of the ?.A, ?.C, ?.D, ?.I, ?.R, ?.S and ?.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 22, 2017
    Inventors: Pierre-Emmanuel Julien Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli