Abstract: The invention relates to image sensors produced with CMOS technology, whose individual pixels, arranged in an array of rows and columns, each consist of a photodiode associated with a charge storage region which receives the photogenerated charge before a charge readout phase. To eliminate the risk of introducing kTC-type noise into the signal, during the reset of the storage zone at the end of a readout cycle, the invention proposes that the storage zone be divided into two parts one of which, adjacent to the reset gage, is covered by a diffused region of the same type of conductivity as the substrate in which the photodiode is formed, this region being brought to the fixed potential of the substrate, and the other of which is not covered by such a region and is not adjacent to the reset gate.

Abstract: The invention relates to image sensors produced on a thinned silicon substrate. To limit the optical crosstalk between adjacent filters and, notably filters of different colors, the invention proposes positioning, between the adjacent filters of different colors (FR, FB, FV), a wall (20) of a material tending to reflect the light so that the light arriving obliquely on a determined filter corresponding to a first pixel does not tend to pass toward an adjacent filter or toward a photosensitive zone corresponding to an adjacent pixel but is returned by the wall to the first filter or the photosensitive zone corresponding to the first pixel. The wall is preferably made of a material with a high reflection coefficient such as aluminium and it is sunk depthwise into the thinned semiconductor layer (16), preferably in p+ diffusions formed in the layer if it is of p-type.

Abstract: The invention relates to image sensors in the form of a signal-integrating, travelling multi-line linear array for the synchronized readout of one and the same linear image successively by N lines of P photosensitive pixels and the pixel by pixel summation of the signals read out by the various lines. At the start of a photogenerated-charge integration time, the output voltage of a pixel of a previous line of rank i?1 is applied to the photodiode of the pixel of an intermediate line of rank i, the photodiode is isolated, the charges due to light are integrated therein and, finally, at the end of the integration time, the charges of the photodiode are transferred to a storage node of the pixel. A charge-voltage conversion circuit transforms the charges of the storage node into an output voltage of the pixel.

Abstract: The invention proposes an image sensor comprising a picture capture matrix having N rows and K columns of image dots, a read register at the free end of the K columns. In order to improve the read speed of the matrix, the invention proposes that the horizontal transfer into the read register be continued even while the vertical signals for shifting from one row to the other are operative, without however continuing the horizontal transfer while the transfer gate between columns and horizontal register is open. The unloading time of the horizontal read register therefore overlaps the time reserved for each vertical transfer step, instead of these times being added together. The gain in time, being repeated for each row, will be all the more significant the higher the number of rows. Means are provided for limiting the effect of the column transfer switching operations on the reading of the charges at the output of the read register.

Abstract: The invention proposes an image sensor comprising a picture capture matrix having N rows and K columns of image dots, a read register at the free end of the K columns. In order to improve the read speed of the matrix, the invention proposes that the horizontal transfer into the read register be continued even while the vertical signals for shifting from one row to the other are operative, without however continuing the horizontal transfer while the transfer gate between columns and horizontal register is open. The unloading time of the horizontal read register therefore overlaps the time reserved for each vertical transfer step, instead of these times being added together. The gain in time, being repeated for each row, will be all the more significant the higher the number of rows. Means are provided for limiting the effect of the column transfer switching operations on the reading of the charges at the output of the read register.