Patents by Inventor Pierre Fourcade

Pierre Fourcade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4593379
    Abstract: A method and device for synchronization of messages, wherein the phase of a reception clock signal is controlled in dependence on the phase of the messages received by causing the absolute value of the phase of the reception clock signal to vary by the quantity A.sub.i (2.pi./N) at the "i.sup.th " transition of the received message, the sequence .vertline.A.sub.i .vertline. being a sequence of decreasing whole numbers where i varies from 1 to p and 2.pi./N designates the elementary step of variation of phase of the reception clock signal. The device includes a read-only memory for storing the values A.sub.i.
    Type: Grant
    Filed: January 6, 1982
    Date of Patent: June 3, 1986
    Assignee: Thomson-CSF
    Inventors: Pierre Fourcade, Dominique Dupray
  • Patent number: 4428063
    Abstract: A device for the time compression of a continuous sequence of data, so as to effect compression in a ratio k=p/n (p and n being positive integers, p not being a factor of n and n not being a factor of p), the ratio p/n representing the ratio of time required for transmission of data after compression to the time required for transmission of the same data before compression. Two memories and a control circuit generate clock signals to fill one of the memories with a package of N bits while emptying the other one. The control circuit receives a clock signal whose frequency is Fu, and divides its frequency by n and by p to generate a clock signal whose frequency is Fu/n and p clock signals whose frequencies are Fu/p and whose phases are shifted of 2.pi./p from one to another. A multiplexer selects one of these p clock signals, at the time when storing and writing of each package of data begins, in order to generate a read clock signal and a write clock signal which are in phase.
    Type: Grant
    Filed: September 29, 1981
    Date of Patent: January 24, 1984
    Assignee: Thomson-CSF
    Inventor: Pierre Fourcade
  • Patent number: 4390985
    Abstract: The invention relates to a device for synchronizing, on reception, digital data transmitted by successive packets modulating different carrier frequencies. It comprises a signal channel comprising a delay line and a circuit for sampling by a synchronized signal at the rhythm f of the data received and a synchronization channel which comprises a logic comparison circuit with two flip-flops comparing the transitions of the data received with reference signals of the same rhythm f, but displaced in time. This circuit supplies the synchronized circuit at the end of the comparison phase. A memory register associated with a multiplexer makes it possible to select this synchronized signal for sampling the corresponding data packet. The time lag introduced by the delay line is equal to the duration of the sychronization phase.
    Type: Grant
    Filed: March 26, 1981
    Date of Patent: June 28, 1983
    Assignee: Thomson-CSF
    Inventors: Pierre Fourcade, Dominique Dupray